diff options
| author | Radhakrishna Sripada <radhakrishna.sripada@intel.com> | 2020-01-09 14:37:27 -0800 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2020-01-15 08:29:07 -0800 |
| commit | f78d5da6e7bd500df734bd1d5260f99ceee9d01f (patch) | |
| tree | 0cab92a14b3a4ecfbf3f7f61272dd03040768f10 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | d54151c5c8c08e2cbb88d62643a9c9c8d9e5f367 (diff) | |
drm/i915/tgl: Add Wa_1409825376 to tgl
Workaround database indicates we should disable VRH clockgating
in pre-production hardware.
V2:
- Use REG_BIT macro
- Update reference in commit message(Matt)
Bspec: 52890
Bspec: 49424
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200109223727.5630-1-radhakrishna.sripada@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index e5071af4a3b3..5e5949edf2a8 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4124,6 +4124,9 @@ enum { #define PWM2_GATING_DIS (1 << 14) #define PWM1_GATING_DIS (1 << 13) +#define GEN9_CLKGATE_DIS_3 _MMIO(0x46538) +#define TGL_VRH_GATING_DIS REG_BIT(31) + #define GEN9_CLKGATE_DIS_4 _MMIO(0x4653C) #define BXT_GMBUS_GATING_DIS (1 << 14) |