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authorYuanhan Liu <yuanhan.liu@linux.intel.com>2010-12-15 15:42:32 +0800
committerChris Wilson <chris@chris-wilson.co.uk>2010-12-15 11:22:27 +0000
commit9c04f015ebc2cc2cca5a4a576deb82a311578edc (patch)
tree9c4b04dc9a07c943c431ce60d45113a1cd78d442 /drivers/gpu/drm/i915/i915_reg.h
parent1398261a2e84c537c409259cfe9db3d0abcd9f99 (diff)
drm/i915: Add frame buffer compression on Sandybridge
Add frame buffer compression on Sandybridge. The method is similar to Ironlake, except that two new registers of type GTTMMADR must be written with the right fence info. Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 61ef98db9ff0..820e9dfaadc7 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -600,6 +600,16 @@
/*
+ * Framebuffer compression for Sandybridge
+ *
+ * The following two registers are of type GTTMMADR
+ */
+#define SNB_DPFC_CTL_SA 0x100100
+#define SNB_CPU_FENCE_ENABLE (1<<29)
+#define DPFC_CPU_FENCE_OFFSET 0x100104
+
+
+/*
* GPIO regs
*/
#define GPIOA 0x5010