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authorDave Airlie <airlied@redhat.com>2019-10-22 13:51:04 +1000
committerDave Airlie <airlied@redhat.com>2019-10-22 13:51:05 +1000
commit89910e62009a9359e6302f7e036a0a4564869cca (patch)
treedfb6d5f1f6a116e06bada6b4f5db2629db9aa367 /drivers/gpu/drm/i915/i915_irq.c
parent7ed093602e0e1b60a0fc074a9692687e7d2b723d (diff)
parentce53908bba6fa6e905d8fe81da4591d3e7a65878 (diff)
Merge tag 'drm-intel-next-2019-10-21' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
UAPI Changes: - Introduce a versioning of the i915-perf uapi (Lionel) - Add support for perf configuration queries (Lionel) Allow listing perf configurations with IOCTL in addition to sysfs. This is useful in container usecases. - Allow dynamic reconfiguration of the OA stream (Chris) Allows the OA stream to be reconfigured between batch buffers, giving greater flexibility in sampling. - Allow holding preemption on filtered perf ctx Allow CAP_ADMIN to block pre-emption of a context to query performance counters without disturbances. Mesa changes: https://gitlab.freedesktop.org/mesa/mesa/merge_requests/932 Cross-subsystem Changes: - drm-next backmerge for HDR DP changes https://lists.freedesktop.org/archives/dri-devel/2019-September/236453.html Driver Changes: - Add DC3CO sleep state for Tigerlake (Anshuman) - Tigerlake BCS engine support engine relative MMIO (Daniele) - Simplify the Tigerlake LRC register list for !RCS (Daniele) - Read SAGV block time from PCODE on Tigerlake (James) - Add 12 missing Tigerlake workarounds (Mika) - Enable DDI/Port G for Tigerlake (Khaled) - Avoid hang in tsg,vfe units by keeping l3 clocks ICL+(Mika) - Fix Bugzilla #111966: Favor last VBT child device (Ville) - Fix blue/black screen on boot due to broken gamma (Swati) - Add support of BT.2020 Colorimetry to DP MSA (Gwan-gyeong) - Attach colorspace property to DP connector (Gwan-gyeong) - Attach HDR metadata property to DP connector (Gwan-gyeong) - Base intel_memory_region support prep for local memory (Matt A) - Introduce Jasper Lake PCH (Matt R) - Support multiple GPUs in PMU (Tvrtko) - Fix MST oops due to MSA changes (Ville) - Refuse modes with hdisplay==4096 on pre-HSW DP (Ville) - Correct the PCH type in irq postinstall for JSP (Vivek) - Save Master transcoder in slave's crtc_state for Transcoder Port Sync (Manasi) - Enable TRANSCODER PORT SYNC for tiled displays across separate ports (Manasi) - HW state readout for transcoder port sync config (Manasi) - Enable master-slaves in trans port sync (Manasi) - In port sync mode disable slaves first then master (Manasi) - Fix port checks for MST support on gen >= 11 (Lucas) - Flush submission tasklet before waiting/retiring (Chris) - Flush tasklet submission before sleeping on i915_request_wait (Chris) - Object pin reference counting fixes (Chris, Matt A) - Clear semaphore immediately upon ELSP promotion (Chris) - Child device size remains unchanged through VBT 229 (Matt R) - Restore dropped 'interruptible' flag on retiring requests (Chris) - Treat a busy timeline as 'active' while waiting (Chris) - Clean up struct_mutex from perf (Chris) - Update locking around execlists->active (Chris) - Mark up expected execlist state during reset (Chris) - Remove cursor use of properties for coordinates (Maarten) - Only mark incomplete requests as -EIO on cancelling (Chris) - Add an rcu_barrier option to i915_drop_caches (Chris) - Replace perf global wakeref tracking with engine-pm (Chris) - Prevent merging requests with conflicting flags (Chris) - Allow for CS OA configs to be created lazily (Lionel) - Implement active wait for noa configurations (Lionel) - Execute OA configuration from command stream (Lionel) - Prefer using the pinned_ctx for emitting delays on config (Chris) - Port C's hotplug interrupt is associated with TC1 bits (Vivek, Matt R) - Extend program of VSC Header and DB for Colorimetry Format (Gwan-gyeong) - Fine-tune timeslicing of contexts (Chris) - Do initial mocs configuration directly (Chris) - Fix uninitialized variable on PMU error path (Tvrtko) - Don't disable interrupts independently of the locking (Sebastian) - Eliminate struct_mutext from GVT (Chris) - Move perf types to their own header (Lionel) - Drop list of perf streams (always size 1) (Lionel) - Store the perf associated engine of a stream (Lionel) - Make array hw_engine_mask static (Colin) - Prefer shortest path to RPM/perf/GT instead of dev_priv (Chris, Tvrtko) - Virtual request submission fixes (Chris) - Selftest/CI improvements (Chris) - Fix Kconfig indentation (Krzysztof) - Give engine->kernel_context distinct timeline lock classes (Chris) - Fix null pointer deref on selftest error path (Colin) - Select DPLL's via mask (Matt R) - Introduce and use intel_atomic_crtc_state_for_each_plane_state (Maarten) - Use intel_plane_state in prepare and cleanup plane_fb (Maarten) - Remove begin/finish_crtc_commit (Maarten) - Move SAGV block time to dev_priv (James) - Avoid polluting the i915_oa_config with error pointers (Chris) - Squelch display kerneldoc warnings (Chris) - Assert tasklet is locked for process_csb() (Chris) - Switch to using DP_MSA_MISC_* defines (Ville) - Stop using drm_atomic_helper_check_planes() (Ville) - Make .modeset_calc_cdclk() mandatory (Ville) - Use drm_rect_translate_to()/drm_rect_init() (Ville) - Refactor timestamping constants update (Ville) - Switch intel_legacy_cursor_update() to intel_ types (Ville) - Prepare the connector/encoder mask readout for hw vs. uapi state split (Ville) - Prepare the mode readout for hw vs. uapi state split (Ville) - Move swizzle_bit under i915_ggtt (Chris) - Improve microcontrollers documentation (Daniele) - Move the cursor rotation handling into intel_cursor_check_surface() (Ville) - Cleanups to pipe code (Ville) - Shrink eDRAM ways/sets arrays for code size (Ville) - Cleanups to HDCP2 timeout code (Ville) - Restore full symmetry in i915_driver_modeset_probe/remove (Janusz) - Simplify setting of ddi_io_power_domain (Lucas) - Add pipe id/name to pipe mismatch logs (Lucas) - Prettify MST debug message (Lucas) - Extract GT ring management to separate files (Andi) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191021180337.GA24338@jlahtine-desk.ger.corp.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c48
1 files changed, 37 insertions, 11 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index f2371b6083c6..572a5c37cc61 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -412,7 +412,7 @@ void gen9_reset_guc_interrupts(struct intel_guc *guc)
{
struct intel_gt *gt = guc_to_gt(guc);
- assert_rpm_wakelock_held(&gt->i915->runtime_pm);
+ assert_rpm_wakelock_held(gt->uncore->rpm);
spin_lock_irq(&gt->irq_lock);
gen6_gt_pm_reset_iir(gt, gt->pm_guc_events);
@@ -423,7 +423,7 @@ void gen9_enable_guc_interrupts(struct intel_guc *guc)
{
struct intel_gt *gt = guc_to_gt(guc);
- assert_rpm_wakelock_held(&gt->i915->runtime_pm);
+ assert_rpm_wakelock_held(gt->uncore->rpm);
spin_lock_irq(&gt->irq_lock);
if (!guc->interrupts.enabled) {
@@ -440,7 +440,7 @@ void gen9_disable_guc_interrupts(struct intel_guc *guc)
{
struct intel_gt *gt = guc_to_gt(guc);
- assert_rpm_wakelock_held(&gt->i915->runtime_pm);
+ assert_rpm_wakelock_held(gt->uncore->rpm);
spin_lock_irq(&gt->irq_lock);
guc->interrupts.enabled = false;
@@ -2248,11 +2248,19 @@ static void icp_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
tc_hotplug_trigger = pch_iir & SDE_TC_MASK_TGP;
tc_port_hotplug_long_detect = tgp_tc_port_hotplug_long_detect;
pins = hpd_tgp;
- } else if (HAS_PCH_MCC(dev_priv)) {
+ } else if (HAS_PCH_JSP(dev_priv)) {
ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_TGP;
tc_hotplug_trigger = 0;
+ pins = hpd_tgp;
+ } else if (HAS_PCH_MCC(dev_priv)) {
+ ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_ICP;
+ tc_hotplug_trigger = pch_iir & SDE_TC_HOTPLUG_ICP(PORT_TC1);
+ tc_port_hotplug_long_detect = icp_tc_port_hotplug_long_detect;
pins = hpd_icp;
} else {
+ WARN(!HAS_PCH_ICP(dev_priv),
+ "Unrecognized PCH type 0x%x\n", INTEL_PCH_TYPE(dev_priv));
+
ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_ICP;
tc_hotplug_trigger = pch_iir & SDE_TC_MASK_ICP;
tc_port_hotplug_long_detect = icp_tc_port_hotplug_long_detect;
@@ -3377,9 +3385,22 @@ static void icp_hpd_irq_setup(struct drm_i915_private *dev_priv,
static void mcc_hpd_irq_setup(struct drm_i915_private *dev_priv)
{
icp_hpd_irq_setup(dev_priv,
+ SDE_DDI_MASK_ICP, SDE_TC_HOTPLUG_ICP(PORT_TC1),
+ ICP_DDI_HPD_ENABLE_MASK, ICP_TC_HPD_ENABLE(PORT_TC1),
+ hpd_icp);
+}
+
+/*
+ * JSP behaves exactly the same as MCC above except that port C is mapped to
+ * the DDI-C pins instead of the TC1 pins. This means we should follow TGP's
+ * masks & tables rather than ICP's masks & tables.
+ */
+static void jsp_hpd_irq_setup(struct drm_i915_private *dev_priv)
+{
+ icp_hpd_irq_setup(dev_priv,
SDE_DDI_MASK_TGP, 0,
TGP_DDI_HPD_ENABLE_MASK, 0,
- hpd_icp);
+ hpd_tgp);
}
static void gen11_hpd_detection_setup(struct drm_i915_private *dev_priv)
@@ -3782,8 +3803,11 @@ static void icp_irq_postinstall(struct drm_i915_private *dev_priv)
if (HAS_PCH_TGP(dev_priv))
icp_hpd_detection_setup(dev_priv, TGP_DDI_HPD_ENABLE_MASK,
TGP_TC_HPD_ENABLE_MASK);
- else if (HAS_PCH_MCC(dev_priv))
+ else if (HAS_PCH_JSP(dev_priv))
icp_hpd_detection_setup(dev_priv, TGP_DDI_HPD_ENABLE_MASK, 0);
+ else if (HAS_PCH_MCC(dev_priv))
+ icp_hpd_detection_setup(dev_priv, ICP_DDI_HPD_ENABLE_MASK,
+ ICP_TC_HPD_ENABLE(PORT_TC1));
else
icp_hpd_detection_setup(dev_priv, ICP_DDI_HPD_ENABLE_MASK,
ICP_TC_HPD_ENABLE_MASK);
@@ -4313,7 +4337,9 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
if (I915_HAS_HOTPLUG(dev_priv))
dev_priv->display.hpd_irq_setup = i915_hpd_irq_setup;
} else {
- if (HAS_PCH_MCC(dev_priv))
+ if (HAS_PCH_JSP(dev_priv))
+ dev_priv->display.hpd_irq_setup = jsp_hpd_irq_setup;
+ else if (HAS_PCH_MCC(dev_priv))
dev_priv->display.hpd_irq_setup = mcc_hpd_irq_setup;
else if (INTEL_GEN(dev_priv) >= 11)
dev_priv->display.hpd_irq_setup = gen11_hpd_irq_setup;
@@ -4460,10 +4486,10 @@ void intel_irq_uninstall(struct drm_i915_private *dev_priv)
int irq = dev_priv->drm.pdev->irq;
/*
- * FIXME we can get called twice during driver load
- * error handling due to intel_modeset_cleanup()
- * calling us out of sequence. Would be nice if
- * it didn't do that...
+ * FIXME we can get called twice during driver probe
+ * error handling as well as during driver remove due to
+ * intel_modeset_driver_remove() calling us out of sequence.
+ * Would be nice if it didn't do that...
*/
if (!dev_priv->drm.irq_enabled)
return;