diff options
author | Dave Airlie <airlied@redhat.com> | 2018-03-14 14:53:01 +1000 |
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committer | Dave Airlie <airlied@redhat.com> | 2018-03-14 14:53:01 +1000 |
commit | 963976cfe9c54d4d9e725e61c90c47a4af6b5ea2 (patch) | |
tree | 20735b399c810390573a8416115978e734eef8a3 /drivers/gpu/drm/i915/i915_gpu_error.c | |
parent | 6fa7324ac5489ad43c4b6351355b869bc5458bef (diff) | |
parent | cf07a60f03f06d6298f4e70b3865bd5faac21c3b (diff) |
Merge tag 'drm-intel-next-2018-03-08' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
UAPI Changes:
- Query uAPI interface (used for GPU topology information currently)
* Mesa: https://patchwork.freedesktop.org/series/38795/
Driver Changes:
- Increase PSR2 size for CNL (DK)
- Avoid retraining LSPCON link unnecessarily (Ville)
- Decrease request signaling latency (Chris)
- GuC error capture fix (Daniele)
* tag 'drm-intel-next-2018-03-08' of git://anongit.freedesktop.org/drm/drm-intel: (127 commits)
drm/i915: Update DRIVER_DATE to 20180308
drm/i915: add schedule out notification of preempted but completed request
drm/i915: expose rcs topology through query uAPI
drm/i915: add query uAPI
drm/i915: add rcs topology to error state
drm/i915/debugfs: add rcs topology entry
drm/i915/debugfs: reuse max slice/subslices already stored in sseu
drm/i915: store all subslice masks
drm/i915/guc: work around gcc-4.4.4 union initializer issue
drm/i915/cnl: Add Wa_2201832410
drm/i915/icl: Gen11 forcewake support
drm/i915/icl: Add Indirect Context Offset for Gen11
drm/i915/icl: Enhanced execution list support
drm/i915/icl: new context descriptor support
drm/i915/icl: Correctly initialize the Gen11 engines
drm/i915: Assert that the request is indeed complete when signaled from irq
drm/i915: Handle changing enable_fbc parameter at runtime better.
drm/i915: Track whether the DP link is trained or not
drm/i915: Nuke intel_dp->channel_eq_status
drm/i915: Move SST DP link retraining into the ->post_hotplug() hook
...
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gpu_error.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_gpu_error.c | 124 |
1 files changed, 49 insertions, 75 deletions
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index 65c0bef73ee5..f89ac7a8f95f 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -586,6 +586,7 @@ static void err_print_capabilities(struct drm_i915_error_state_buf *m, intel_device_info_dump_flags(info, &p); intel_driver_caps_print(caps, &p); + intel_device_info_dump_topology(&info->sseu, &p); } static void err_print_params(struct drm_i915_error_state_buf *m, @@ -991,7 +992,7 @@ out: static inline uint32_t __active_get_seqno(struct i915_gem_active *active) { - struct drm_i915_gem_request *request; + struct i915_request *request; request = __i915_gem_active_peek(active); return request ? request->global_seqno : 0; @@ -1000,7 +1001,7 @@ __active_get_seqno(struct i915_gem_active *active) static inline int __active_get_engine_id(struct i915_gem_active *active) { - struct drm_i915_gem_request *request; + struct i915_request *request; request = __i915_gem_active_peek(active); return request ? request->engine->id : -1; @@ -1084,9 +1085,9 @@ static uint32_t i915_error_generate_code(struct drm_i915_private *dev_priv, return error_code; } -static void i915_gem_record_fences(struct drm_i915_private *dev_priv, - struct i915_gpu_state *error) +static void gem_record_fences(struct i915_gpu_state *error) { + struct drm_i915_private *dev_priv = error->i915; int i; if (INTEL_GEN(dev_priv) >= 6) { @@ -1102,27 +1103,6 @@ static void i915_gem_record_fences(struct drm_i915_private *dev_priv, error->nfence = i; } -static inline u32 -gen8_engine_sync_index(struct intel_engine_cs *engine, - struct intel_engine_cs *other) -{ - int idx; - - /* - * rcs -> 0 = vcs, 1 = bcs, 2 = vecs, 3 = vcs2; - * vcs -> 0 = bcs, 1 = vecs, 2 = vcs2, 3 = rcs; - * bcs -> 0 = vecs, 1 = vcs2. 2 = rcs, 3 = vcs; - * vecs -> 0 = vcs2, 1 = rcs, 2 = vcs, 3 = bcs; - * vcs2 -> 0 = rcs, 1 = vcs, 2 = bcs, 3 = vecs; - */ - - idx = (other - engine) - 1; - if (idx < 0) - idx += I915_NUM_ENGINES; - - return idx; -} - static void gen6_record_semaphore_state(struct intel_engine_cs *engine, struct drm_i915_error_engine *ee) { @@ -1293,7 +1273,7 @@ static void error_record_engine_registers(struct i915_gpu_state *error, } } -static void record_request(struct drm_i915_gem_request *request, +static void record_request(struct i915_request *request, struct drm_i915_error_request *erq) { erq->context = request->ctx->hw_id; @@ -1310,10 +1290,10 @@ static void record_request(struct drm_i915_gem_request *request, } static void engine_record_requests(struct intel_engine_cs *engine, - struct drm_i915_gem_request *first, + struct i915_request *first, struct drm_i915_error_engine *ee) { - struct drm_i915_gem_request *request; + struct i915_request *request; int count; count = 0; @@ -1363,7 +1343,7 @@ static void error_record_engine_execlists(struct intel_engine_cs *engine, unsigned int n; for (n = 0; n < execlists_num_ports(execlists); n++) { - struct drm_i915_gem_request *rq = port_request(&execlists->port[n]); + struct i915_request *rq = port_request(&execlists->port[n]); if (!rq) break; @@ -1398,10 +1378,10 @@ static void record_context(struct drm_i915_error_context *e, e->active = atomic_read(&ctx->active_count); } -static void request_record_user_bo(struct drm_i915_gem_request *request, +static void request_record_user_bo(struct i915_request *request, struct drm_i915_error_engine *ee) { - struct i915_gem_capture_list *c; + struct i915_capture_list *c; struct drm_i915_error_object **bo; long count; @@ -1445,16 +1425,16 @@ capture_object(struct drm_i915_private *dev_priv, } } -static void i915_gem_record_rings(struct drm_i915_private *dev_priv, - struct i915_gpu_state *error) +static void gem_record_rings(struct i915_gpu_state *error) { - struct i915_ggtt *ggtt = &dev_priv->ggtt; + struct drm_i915_private *i915 = error->i915; + struct i915_ggtt *ggtt = &i915->ggtt; int i; for (i = 0; i < I915_NUM_ENGINES; i++) { - struct intel_engine_cs *engine = dev_priv->engine[i]; + struct intel_engine_cs *engine = i915->engine[i]; struct drm_i915_error_engine *ee = &error->engine[i]; - struct drm_i915_gem_request *request; + struct i915_request *request; ee->engine_id = -1; @@ -1481,17 +1461,16 @@ static void i915_gem_record_rings(struct drm_i915_private *dev_priv, * by userspace. */ ee->batchbuffer = - i915_error_object_create(dev_priv, - request->batch); + i915_error_object_create(i915, request->batch); - if (HAS_BROKEN_CS_TLB(dev_priv)) + if (HAS_BROKEN_CS_TLB(i915)) ee->wa_batchbuffer = - i915_error_object_create(dev_priv, + i915_error_object_create(i915, engine->scratch); request_record_user_bo(request, ee); ee->ctx = - i915_error_object_create(dev_priv, + i915_error_object_create(i915, request->ctx->engine[i].state); error->simulated |= @@ -1505,27 +1484,24 @@ static void i915_gem_record_rings(struct drm_i915_private *dev_priv, ee->cpu_ring_head = ring->head; ee->cpu_ring_tail = ring->tail; ee->ringbuffer = - i915_error_object_create(dev_priv, ring->vma); + i915_error_object_create(i915, ring->vma); engine_record_requests(engine, request, ee); } ee->hws_page = - i915_error_object_create(dev_priv, + i915_error_object_create(i915, engine->status_page.vma); - ee->wa_ctx = - i915_error_object_create(dev_priv, engine->wa_ctx.vma); + ee->wa_ctx = i915_error_object_create(i915, engine->wa_ctx.vma); - ee->default_state = - capture_object(dev_priv, engine->default_state); + ee->default_state = capture_object(i915, engine->default_state); } } -static void i915_gem_capture_vm(struct drm_i915_private *dev_priv, - struct i915_gpu_state *error, - struct i915_address_space *vm, - int idx) +static void gem_capture_vm(struct i915_gpu_state *error, + struct i915_address_space *vm, + int idx) { struct drm_i915_error_buffer *active_bo; struct i915_vma *vma; @@ -1548,8 +1524,7 @@ static void i915_gem_capture_vm(struct drm_i915_private *dev_priv, error->active_bo_count[idx] = count; } -static void i915_capture_active_buffers(struct drm_i915_private *dev_priv, - struct i915_gpu_state *error) +static void capture_active_buffers(struct i915_gpu_state *error) { int cnt = 0, i, j; @@ -1569,14 +1544,13 @@ static void i915_capture_active_buffers(struct drm_i915_private *dev_priv, for (j = 0; j < i && !found; j++) found = error->engine[j].vm == ee->vm; if (!found) - i915_gem_capture_vm(dev_priv, error, ee->vm, cnt++); + gem_capture_vm(error, ee->vm, cnt++); } } -static void i915_capture_pinned_buffers(struct drm_i915_private *dev_priv, - struct i915_gpu_state *error) +static void capture_pinned_buffers(struct i915_gpu_state *error) { - struct i915_address_space *vm = &dev_priv->ggtt.base; + struct i915_address_space *vm = &error->i915->ggtt.base; struct drm_i915_error_buffer *bo; struct i915_vma *vma; int count_inactive, count_active; @@ -1626,9 +1600,9 @@ static void capture_uc_state(struct i915_gpu_state *error) } /* Capture all registers which don't fit into another category. */ -static void i915_capture_reg_state(struct drm_i915_private *dev_priv, - struct i915_gpu_state *error) +static void capture_reg_state(struct i915_gpu_state *error) { + struct drm_i915_private *dev_priv = error->i915; int i; /* General organization @@ -1725,24 +1699,25 @@ static void i915_error_capture_msg(struct drm_i915_private *dev_priv, engine_mask ? "reset" : "continue"); } -static void i915_capture_gen_state(struct drm_i915_private *dev_priv, - struct i915_gpu_state *error) +static void capture_gen_state(struct i915_gpu_state *error) { - error->awake = dev_priv->gt.awake; - error->wakelock = atomic_read(&dev_priv->runtime_pm.wakeref_count); - error->suspended = dev_priv->runtime_pm.suspended; + struct drm_i915_private *i915 = error->i915; + + error->awake = i915->gt.awake; + error->wakelock = atomic_read(&i915->runtime_pm.wakeref_count); + error->suspended = i915->runtime_pm.suspended; error->iommu = -1; #ifdef CONFIG_INTEL_IOMMU error->iommu = intel_iommu_gfx_mapped; #endif - error->reset_count = i915_reset_count(&dev_priv->gpu_error); - error->suspend_count = dev_priv->suspend_count; + error->reset_count = i915_reset_count(&i915->gpu_error); + error->suspend_count = i915->suspend_count; memcpy(&error->device_info, - INTEL_INFO(dev_priv), + INTEL_INFO(i915), sizeof(error->device_info)); - error->driver_caps = dev_priv->caps; + error->driver_caps = i915->caps; } static __always_inline void dup_param(const char *type, void *x) @@ -1769,14 +1744,13 @@ static int capture(void *data) error->i915->gt.last_init_time); capture_params(error); + capture_gen_state(error); capture_uc_state(error); - - i915_capture_gen_state(error->i915, error); - i915_capture_reg_state(error->i915, error); - i915_gem_record_fences(error->i915, error); - i915_gem_record_rings(error->i915, error); - i915_capture_active_buffers(error->i915, error); - i915_capture_pinned_buffers(error->i915, error); + capture_reg_state(error); + gem_record_fences(error); + gem_record_rings(error); + capture_active_buffers(error); + capture_pinned_buffers(error); error->overlay = intel_overlay_capture_error_state(error->i915); error->display = intel_display_capture_error_state(error->i915); |