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authorKeith Packard <keithp@keithp.com>2011-09-19 21:34:19 -0700
committerKeith Packard <keithp@keithp.com>2011-09-21 15:03:11 -0700
commitcd0de039bff32ee314046c0e4c047c38aa696f84 (patch)
tree443b149593031f6dd0f7d6fd326e3cc31ae393b7 /drivers/gpu/drm/i915/i915_drv.c
parentcc68c81aed7d892deaf12d720d5455208e94cd0a (diff)
drm/i915: FBC off for ironlake and older, otherwise on by default
Make the default FBC behaviour chipset specific, allowing us to turn it on by default for Ironlake and older where it has been seen to cause trouble with screen updates. Signed-off-by: Keith Packard <keithp@keithp.com> Tested-by: Francis Moreau <francis.moro@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.c')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index ce045a8cf82c..f07e4252b708 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -67,11 +67,11 @@ module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0600);
MODULE_PARM_DESC(i915_enable_rc6,
"Enable power-saving render C-state 6 (default: true)");
-unsigned int i915_enable_fbc __read_mostly = 1;
+unsigned int i915_enable_fbc __read_mostly = -1;
module_param_named(i915_enable_fbc, i915_enable_fbc, int, 0600);
MODULE_PARM_DESC(i915_enable_fbc,
"Enable frame buffer compression for power savings "
- "(default: false)");
+ "(default: -1 (use per-chip default))");
unsigned int i915_lvds_downclock __read_mostly = 0;
module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);