diff options
author | Chris Wilson <chris@chris-wilson.co.uk> | 2016-08-24 10:27:01 +0100 |
---|---|---|
committer | Chris Wilson <chris@chris-wilson.co.uk> | 2016-08-24 19:39:28 +0100 |
commit | abc80abde5bd5962a4ec4e126ab7867c0b5fd195 (patch) | |
tree | 4408f11bd1eb0d274f77f2e5bd192884cbddde12 /drivers/gpu/drm/i915/i915_drv.c | |
parent | 79cf219a6a2ecf553587fae41b117d8c49cc0a55 (diff) |
drm/i915: Force RC6 restore after system resume and reset
In order for the RC6 autoenable worker to take any action, RC6 first
must be disabled. Upon resume or reset, the sw state may be stale and so
we require a forced restore.
Fixes: b7137e0cf1e5 ("drm/i915: Defer enabling rc6 til after we submit...")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20160824092701.19178-1-chris@chris-wilson.co.uk
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 5a7c0c2e57d8..fc9273215286 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1560,6 +1560,7 @@ static int i915_drm_resume(struct drm_device *dev) int ret; disable_rpm_wakeref_asserts(dev_priv); + intel_sanitize_gt_powersave(dev_priv); ret = i915_ggtt_enable_hw(dev_priv); if (ret) @@ -1809,6 +1810,7 @@ int i915_reset(struct drm_i915_private *dev_priv) * previous concerns that it doesn't respond well to some forms * of re-init after reset. */ + intel_sanitize_gt_powersave(dev_priv); intel_autoenable_gt_powersave(dev_priv); return 0; |