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authorfred gao <fred.gao@intel.com>2019-01-09 09:20:00 +0800
committerZhenyu Wang <zhenyuw@linux.intel.com>2019-01-10 11:35:50 +0800
commit5cd02703b0a497c502e8d8a8047f3a53bffacd20 (patch)
tree7b17019a827743673bd705de9b409004f00db96d /drivers/gpu/drm/i915/gvt
parent36520ed005e71f6b8e2c23fa446b47d97410c173 (diff)
drm/i915/gvt: Add mmio handler for CFL
Add registers of 0x4ab8 and 0x2248 into MMIO handler. Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Fei Jiang <fei.jiang@intel.com> Signed-off-by: fred gao <fred.gao@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/gvt')
-rw-r--r--drivers/gpu/drm/i915/gvt/handlers.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index c1170f42b6a1..9910ba16d815 100644
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -3043,8 +3043,8 @@ static int init_skl_mmio_info(struct intel_gvt *gvt)
MMIO_DFH(GEN9_WM_CHICKEN3, D_SKL_PLUS, F_MODE_MASK | F_CMD_ACCESS,
NULL, NULL);
- MMIO_D(_MMIO(0x4ab8), D_KBL);
- MMIO_D(_MMIO(0x2248), D_KBL | D_SKL);
+ MMIO_D(_MMIO(0x4ab8), D_KBL | D_CFL);
+ MMIO_D(_MMIO(0x2248), D_SKL_PLUS);
return 0;
}