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authorImre Deak <imre.deak@intel.com>2020-10-07 20:09:12 +0300
committerImre Deak <imre.deak@intel.com>2020-10-12 15:31:35 +0300
commit6777a855d66d27c4082d6316cc0f2a26a004ed62 (patch)
tree9e660b5e36846814b5b160aa19192c2a6972de5d /drivers/gpu/drm/i915/display/intel_dp_link_training.c
parent3bcacad3d7a9ab727e9ac1a110dac4ddc78bca32 (diff)
drm/i915: Fix DP link training pattern mask
An LTTPR can be trained with training pattern 4 even if the DPCD revision is < 1.4, but drm_dp_training_pattern_mask() would change pattern 4 to pattern 3 on those DPCD revisions. Since intel_dp_training_pattern() makes already sure that the proper training pattern is used, all that needs to be masked out is the scrambling disable flag, which is or'd to the mask later based on the training pattern. v2: - Use a helper instead of open-coding the masking. (Ville) Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201007170917.1764556-2-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_link_training.c')
-rw-r--r--drivers/gpu/drm/i915/display/intel_dp_link_training.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 51e8d46d9b7f..b2ff88a152cd 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -100,7 +100,7 @@ intel_dp_set_link_train(struct intel_dp *intel_dp,
dp_train_pat);
buf[0] = dp_train_pat;
- if ((dp_train_pat & DP_TRAINING_PATTERN_MASK) ==
+ if (intel_dp_training_pattern_symbol(dp_train_pat) ==
DP_TRAINING_PATTERN_DISABLE) {
/* don't write DP_TRAINING_LANEx_SET on disable */
len = 1;