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authorLucas Stach <l.stach@pengutronix.de>2018-05-04 11:58:45 +0200
committerLucas Stach <l.stach@pengutronix.de>2018-05-18 15:27:56 +0200
commit931e97f3afd80bd9671d92f6934306a56012cae8 (patch)
treebcf96006e7b6b3bf70fd0cdd69915d419315189c /drivers/gpu/drm/etnaviv
parenta1fb6f204f956cc8385c31600354e2039978ebb4 (diff)
drm/etnaviv: mmuv2: support 40 bit phys address
MMUv2 supports up to 40 bits of physical address by folding the upper 8 bits into bits [4:11] of the PTE. Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Diffstat (limited to 'drivers/gpu/drm/etnaviv')
-rw-r--r--drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c b/drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c
index 6336fdc70433..72bd0107a00c 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c
@@ -87,11 +87,14 @@ static int etnaviv_iommuv2_map(struct etnaviv_iommu_domain *domain,
struct etnaviv_iommuv2_domain *etnaviv_domain =
to_etnaviv_domain(domain);
int mtlb_entry, stlb_entry, ret;
- u32 entry = (u32)paddr | MMUv2_PTE_PRESENT;
+ u32 entry = lower_32_bits(paddr) | MMUv2_PTE_PRESENT;
if (size != SZ_4K)
return -EINVAL;
+ if (IS_ENABLED(CONFIG_PHYS_ADDR_T_64BIT))
+ entry |= (upper_32_bits(paddr) & 0xff) << 4;
+
if (prot & ETNAVIV_PROT_WRITE)
entry |= MMUv2_PTE_WRITEABLE;