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authorChristian Gmeiner <christian.gmeiner@gmail.com>2017-09-24 15:15:39 +0200
committerLucas Stach <l.stach@pengutronix.de>2017-10-10 11:45:53 +0200
commit2c8b0c5a99054ba909036d7f9c7bb7391b48b6f5 (patch)
tree351f136aa83af0030f0a16f22946a487dd4f3e42 /drivers/gpu/drm/etnaviv
parent49168ee91dd4c47749d52ec270861026da3ccc45 (diff)
drm/etnaviv: need to disable clock gating when doing profiling
As done by Vivante kernel driver. Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Diffstat (limited to 'drivers/gpu/drm/etnaviv')
-rw-r--r--drivers/gpu/drm/etnaviv/etnaviv_gpu.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
index 56764b4b94aa..c00086d75580 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
@@ -1346,6 +1346,13 @@ static void sync_point_perfmon_sample(struct etnaviv_gpu *gpu,
static void sync_point_perfmon_sample_pre(struct etnaviv_gpu *gpu,
struct etnaviv_event *event)
{
+ u32 val;
+
+ /* disable clock gating */
+ val = gpu_read(gpu, VIVS_PM_POWER_CONTROLS);
+ val &= ~VIVS_PM_POWER_CONTROLS_ENABLE_MODULE_CLOCK_GATING;
+ gpu_write(gpu, VIVS_PM_POWER_CONTROLS, val);
+
sync_point_perfmon_sample(gpu, event, ETNA_PM_PROCESS_PRE);
}
@@ -1354,6 +1361,7 @@ static void sync_point_perfmon_sample_post(struct etnaviv_gpu *gpu,
{
const struct etnaviv_cmdbuf *cmdbuf = event->cmdbuf;
unsigned int i;
+ u32 val;
sync_point_perfmon_sample(gpu, event, ETNA_PM_PROCESS_POST);
@@ -1362,6 +1370,11 @@ static void sync_point_perfmon_sample_post(struct etnaviv_gpu *gpu,
*pmr->bo_vma = pmr->sequence;
}
+
+ /* enable clock gating */
+ val = gpu_read(gpu, VIVS_PM_POWER_CONTROLS);
+ val |= VIVS_PM_POWER_CONTROLS_ENABLE_MODULE_CLOCK_GATING;
+ gpu_write(gpu, VIVS_PM_POWER_CONTROLS, val);
}