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author | Eric Bernstein <eric.bernstein@amd.com> | 2018-05-14 17:01:00 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2018-06-15 12:20:27 -0500 |
commit | 0b126112e90a96907aa14c39374fc7bfdbba131a (patch) | |
tree | 3a6a2e3704fb79d088650cfbef67341058bd4140 /drivers/gpu/drm/drm_scatter.c | |
parent | 8de94233f4cdcd5b3065fa9b9af3edc10874a120 (diff) |
drm/amd/display: DP YCbCr 4:2:0 support
Update MSA MISC1 bit 6 programming to handle YCbCr 4:2:0
and BT2020 cases.
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/drm_scatter.c')
0 files changed, 0 insertions, 0 deletions