diff options
| author | Russell King <rmk+kernel@armlinux.org.uk> | 2016-08-16 22:09:10 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@armlinux.org.uk> | 2016-11-01 20:06:55 +0000 |
| commit | 2925db08174eea7afc32258b6fbb4a57810846a0 (patch) | |
| tree | 425285c2920d9e3d7f4f710629f90b9ef805892f /drivers/gpu/drm/armada | |
| parent | 37af35c778587b3e0e42d7b816fe4f6170f9c304 (diff) | |
drm/armada: move setting primary plane position to armada_drm_primary_set()
Move the setting of the primary plane position into
armada_drm_primary_set() rather than the initialisation function.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'drivers/gpu/drm/armada')
| -rw-r--r-- | drivers/gpu/drm/armada/armada_crtc.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/armada/armada_crtc.c b/drivers/gpu/drm/armada/armada_crtc.c index 5fff7cada6f5..6d3b0edde8d7 100644 --- a/drivers/gpu/drm/armada/armada_crtc.c +++ b/drivers/gpu/drm/armada/armada_crtc.c @@ -532,13 +532,14 @@ static void armada_drm_primary_set(struct drm_crtc *crtc, { struct armada_plane_state *state = &drm_to_armada_plane(plane)->state; struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc); - struct armada_regs regs[7]; + struct armada_regs regs[8]; bool interlaced = dcrtc->interlaced; unsigned i; - uint32_t ctrl0; + u32 ctrl0; i = armada_drm_crtc_calc_fb(plane->fb, x, y, regs, interlaced); + armada_reg_queue_set(regs, i, state->dst_yx, LCD_SPU_GRA_OVSA_HPXL_VLN); armada_reg_queue_set(regs, i, state->src_hw, LCD_SPU_GRA_HPXL_VLN); armada_reg_queue_set(regs, i, state->dst_hw, LCD_SPU_GZM_HPXL_VLN); @@ -1191,7 +1192,6 @@ static int armada_drm_crtc_create(struct drm_device *drm, struct device *dev, CFG_PDWN32x32 | CFG_PDWN16x66 | CFG_PDWN32x66 | CFG_PDWN64x66, dcrtc->base + LCD_SPU_SRAM_PARA1); writel_relaxed(0x2032ff81, dcrtc->base + LCD_SPU_DMA_CTRL1); - writel_relaxed(0x00000000, dcrtc->base + LCD_SPU_GRA_OVSA_HPXL_VLN); writel_relaxed(dcrtc->irq_ena, dcrtc->base + LCD_SPU_IRQ_ENA); writel_relaxed(0, dcrtc->base + LCD_SPU_IRQ_ISR); |