diff options
author | Hawking Zhang <Hawking.Zhang@amd.com> | 2019-09-03 03:19:31 +0800 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2019-09-13 17:42:08 -0500 |
commit | 9dc913425807c82a7cb942458540a9423182697d (patch) | |
tree | 00cf5ae52dcb1b6e77975e7ec4e668f3132d934d /drivers/gpu/drm/amd | |
parent | 1c70d3d9c4a6d4e4b4425d78e0a919cfaa3cf8db (diff) |
drm/amdgpu: init UMC & RSMU register base address
UMC RAS feature requires access to UMC & RSMU registers
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/arct_reg_init.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/arct_reg_init.c b/drivers/gpu/drm/amd/amdgpu/arct_reg_init.c index 4853899b1824..e62609d5126b 100644 --- a/drivers/gpu/drm/amd/amdgpu/arct_reg_init.c +++ b/drivers/gpu/drm/amd/amdgpu/arct_reg_init.c @@ -52,6 +52,8 @@ int arct_reg_base_init(struct amdgpu_device *adev) adev->reg_offset[SDMA7_HWIP][i] = (uint32_t *)(&(SDMA7_BASE.instance[i])); adev->reg_offset[SMUIO_HWIP][i] = (uint32_t *)(&(SMUIO_BASE.instance[i])); adev->reg_offset[THM_HWIP][i] = (uint32_t *)(&(THM_BASE.instance[i])); + adev->reg_offset[UMC_HWIP][i] = (uint32_t *)(&(UMC_BASE.instance[i])); + adev->reg_offset[RSMU_HWIP][i] = (uint32_t *)(&(RSMU_BASE.instance[i])); } return 0; } |