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authorRex Zhu <Rex.Zhu@amd.com>2017-05-10 16:33:03 +0800
committerAlex Deucher <alexander.deucher@amd.com>2017-05-24 17:39:43 -0400
commit9312d9a6a02af1bc8b4bdae42f68e7b77ff35ae5 (patch)
treead910605e3757f77e0dbaaa03a25f2a30d7f3e25 /drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h
parent14641ac4ebfbef47f183d5610f0e31affb9ba187 (diff)
drm/amd/powerplay: update vega10 smu interface version to E.
need update smu firmware to version 0x1c20. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewws-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h')
-rw-r--r--drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h38
1 files changed, 19 insertions, 19 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h b/drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h
index d43f98a910b0..532186b6f941 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h
@@ -30,7 +30,7 @@
* SMU TEAM: Always increment the interface version if
* any structure is changed in this file
*/
-#define SMU9_DRIVER_IF_VERSION 0xD
+#define SMU9_DRIVER_IF_VERSION 0xE
#define PPTABLE_V10_SMU_VERSION 1
@@ -380,25 +380,25 @@ typedef struct {
uint8_t AvfsVersion;
uint8_t Padding[2];
- uint32_t VFT0_m1; /* Q16.16 */
- uint32_t VFT0_m2; /* Q16.16 */
- uint32_t VFT0_b; /* Q16.16 */
+ int32_t VFT0_m1; /* Q8.24 */
+ int32_t VFT0_m2; /* Q12.12 */
+ int32_t VFT0_b; /* Q32 */
- uint32_t VFT1_m1; /* Q16.16 */
- uint32_t VFT1_m2; /* Q16.16 */
- uint32_t VFT1_b; /* Q16.16 */
+ int32_t VFT1_m1; /* Q8.16 */
+ int32_t VFT1_m2; /* Q12.12 */
+ int32_t VFT1_b; /* Q32 */
- uint32_t VFT2_m1; /* Q16.16 */
- uint32_t VFT2_m2; /* Q16.16 */
- uint32_t VFT2_b; /* Q16.16 */
+ int32_t VFT2_m1; /* Q8.16 */
+ int32_t VFT2_m2; /* Q12.12 */
+ int32_t VFT2_b; /* Q32 */
- uint32_t AvfsGb0_m1; /* Q16.16 */
- uint32_t AvfsGb0_m2; /* Q16.16 */
- uint32_t AvfsGb0_b; /* Q16.16 */
+ int32_t AvfsGb0_m1; /* Q8.16 */
+ int32_t AvfsGb0_m2; /* Q12.12 */
+ int32_t AvfsGb0_b; /* Q32 */
- uint32_t AcBtcGb_m1; /* Q16.16 */
- uint32_t AcBtcGb_m2; /* Q16.16 */
- uint32_t AcBtcGb_b; /* Q16.16 */
+ int32_t AcBtcGb_m1; /* Q8.24 */
+ int32_t AcBtcGb_m2; /* Q12.12 */
+ int32_t AcBtcGb_b; /* Q32 */
uint32_t AvfsTempCold;
uint32_t AvfsTempMid;
@@ -406,9 +406,9 @@ typedef struct {
uint32_t InversionVoltage; /* in mV with 2 fractional bits */
- uint32_t P2V_m1; /* Q16.16 */
- uint32_t P2V_m2; /* Q16.16 */
- uint32_t P2V_b; /* Q16.16 */
+ int32_t P2V_m1; /* Q8.24 */
+ int32_t P2V_m2; /* Q12.12 */
+ int32_t P2V_b; /* Q32 */
uint32_t P2VCharzFreq; /* in 10KHz units */