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authorRex Zhu <Rex.Zhu@amd.com>2018-01-23 16:28:09 +0800
committerAlex Deucher <alexander.deucher@amd.com>2018-02-19 14:18:46 -0500
commitce91b71c9a0bcdf28bade5e5e3501f2a34af3d29 (patch)
tree2fe332fd9e797772b879f675888d02b1b319622c /drivers/gpu/drm/amd/powerplay/hwmgr
parentef4bccbdbf03a9b15e367dc98486478e9aa42418 (diff)
drm/amd/pp: Change activity_target for performance optimization on Polaris
And not support perDPM level optimization on Polaris, so delete sclk activity_target array. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/hwmgr')
-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/smu7_dyn_defaults.h2
-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c1
-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h1
3 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_dyn_defaults.h b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_dyn_defaults.h
index f967613191cf..3477d4dfff70 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_dyn_defaults.h
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_dyn_defaults.h
@@ -50,6 +50,6 @@
#define SMU7_CGULVCONTROL_DFLT 0x00007450
#define SMU7_TARGETACTIVITY_DFLT 50
#define SMU7_MCLK_TARGETACTIVITY_DFLT 10
-
+#define SMU7_SCLK_TARGETACTIVITY_DFLT 30
#endif
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index 54f569c8e31a..3ff9536a2641 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -1485,6 +1485,7 @@ static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr)
data->dll_default_on = false;
data->mclk_dpm0_activity_target = 0xa;
data->mclk_activity_target = SMU7_MCLK_TARGETACTIVITY_DFLT;
+ data->sclk_activity_target = SMU7_SCLK_TARGETACTIVITY_DFLT;
data->vddc_vddgfx_delta = 300;
data->static_screen_threshold = SMU7_STATICSCREENTHRESHOLD_DFLT;
data->static_screen_threshold_unit = SMU7_STATICSCREENTHRESHOLDUNIT_DFLT;
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h
index 1ce84cc6a7f4..a626a3eafc23 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h
@@ -290,6 +290,7 @@ struct smu7_hwmgr {
bool use_pcie_performance_levels;
bool use_pcie_power_saving_levels;
uint32_t mclk_activity_target;
+ uint16_t sclk_activity_target;
uint32_t mclk_dpm0_activity_target;
uint32_t low_sclk_interrupt_threshold;
uint32_t last_mclk_dpm_enable_mask;