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authorRodrigo Siqueira <Rodrigo.Siqueira@amd.com>2020-04-24 10:49:38 -0400
committerAlex Deucher <alexander.deucher@amd.com>2020-05-28 14:00:48 -0400
commit569f4f9bf059ee3f08afe4b48fc77513386d2543 (patch)
tree2769965603228768505dcdb4fbcd0eacff87906e /drivers/gpu/drm/amd/display
parent0922b899f36621126d49c0d86e90fb18d572d8a1 (diff)
drm/amd/display: Add bit swap helper based on endianness
Christian Koenig pointed out a code duplication related to bit swap in case of big-endian manipulation. This commit adds a helper for handling this verification and reduces the requirement of replicate some part of the code. Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Reviewed-by: Wyatt Wood <Wyatt.Wood@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display')
-rw-r--r--drivers/gpu/drm/amd/display/modules/power/power_helpers.c50
1 files changed, 26 insertions, 24 deletions
diff --git a/drivers/gpu/drm/amd/display/modules/power/power_helpers.c b/drivers/gpu/drm/amd/display/modules/power/power_helpers.c
index 8c37bcc27132..60b92f099af5 100644
--- a/drivers/gpu/drm/amd/display/modules/power/power_helpers.c
+++ b/drivers/gpu/drm/amd/display/modules/power/power_helpers.c
@@ -29,6 +29,8 @@
#include "core_types.h"
#define DIV_ROUNDUP(a, b) (((a)+((b)/2))/(b))
+#define bswap16_based_on_endian(big_endian, value) \
+ (big_endian) ? cpu_to_be16(value) : cpu_to_le16(value)
/* Possible Min Reduction config from least aggressive to most aggressive
* 0 1 2 3 4 5 6 7 8 9 10 11 12
@@ -624,30 +626,30 @@ void fill_iram_v_2_3(struct iram_table_v_2_2 *ram_table, struct dmcu_iram_parame
ram_table->iir_curve[4] = 0x65;
//Gamma 2.2
- ram_table->crgb_thresh[0] = (big_endian) ? cpu_to_be16(0x127c) : cpu_to_le16(0x127c);
- ram_table->crgb_thresh[1] = (big_endian) ? cpu_to_be16(0x151b) : cpu_to_le16(0x151b);
- ram_table->crgb_thresh[2] = (big_endian) ? cpu_to_be16(0x17d5) : cpu_to_le16(0x17d5);
- ram_table->crgb_thresh[3] = (big_endian) ? cpu_to_be16(0x1a56) : cpu_to_le16(0x1a56);
- ram_table->crgb_thresh[4] = (big_endian) ? cpu_to_be16(0x1c83) : cpu_to_le16(0x1c83);
- ram_table->crgb_thresh[5] = (big_endian) ? cpu_to_be16(0x1e72) : cpu_to_le16(0x1e72);
- ram_table->crgb_thresh[6] = (big_endian) ? cpu_to_be16(0x20f0) : cpu_to_le16(0x20f0);
- ram_table->crgb_thresh[7] = (big_endian) ? cpu_to_be16(0x232b) : cpu_to_le16(0x232b);
- ram_table->crgb_offset[0] = (big_endian) ? cpu_to_be16(0x2999) : cpu_to_le16(0x2999);
- ram_table->crgb_offset[1] = (big_endian) ? cpu_to_be16(0x3999) : cpu_to_le16(0x3999);
- ram_table->crgb_offset[2] = (big_endian) ? cpu_to_be16(0x4666) : cpu_to_le16(0x4666);
- ram_table->crgb_offset[3] = (big_endian) ? cpu_to_be16(0x5999) : cpu_to_le16(0x5999);
- ram_table->crgb_offset[4] = (big_endian) ? cpu_to_be16(0x6333) : cpu_to_le16(0x6333);
- ram_table->crgb_offset[5] = (big_endian) ? cpu_to_be16(0x7800) : cpu_to_le16(0x7800);
- ram_table->crgb_offset[6] = (big_endian) ? cpu_to_be16(0x8c00) : cpu_to_le16(0x8c00);
- ram_table->crgb_offset[7] = (big_endian) ? cpu_to_be16(0xa000) : cpu_to_le16(0xa000);
- ram_table->crgb_slope[0] = (big_endian) ? cpu_to_be16(0x3609) : cpu_to_le16(0x3609);
- ram_table->crgb_slope[1] = (big_endian) ? cpu_to_be16(0x2dfa) : cpu_to_le16(0x2dfa);
- ram_table->crgb_slope[2] = (big_endian) ? cpu_to_be16(0x27ea) : cpu_to_le16(0x27ea);
- ram_table->crgb_slope[3] = (big_endian) ? cpu_to_be16(0x235d) : cpu_to_le16(0x235d);
- ram_table->crgb_slope[4] = (big_endian) ? cpu_to_be16(0x2042) : cpu_to_le16(0x2042);
- ram_table->crgb_slope[5] = (big_endian) ? cpu_to_be16(0x1dc3) : cpu_to_le16(0x1dc3);
- ram_table->crgb_slope[6] = (big_endian) ? cpu_to_be16(0x1b1a) : cpu_to_le16(0x1b1a);
- ram_table->crgb_slope[7] = (big_endian) ? cpu_to_be16(0x1910) : cpu_to_le16(0x1910);
+ ram_table->crgb_thresh[0] = bswap16_based_on_endian(big_endian, 0x127c);
+ ram_table->crgb_thresh[1] = bswap16_based_on_endian(big_endian, 0x151b);
+ ram_table->crgb_thresh[2] = bswap16_based_on_endian(big_endian, 0x17d5);
+ ram_table->crgb_thresh[3] = bswap16_based_on_endian(big_endian, 0x1a56);
+ ram_table->crgb_thresh[4] = bswap16_based_on_endian(big_endian, 0x1c83);
+ ram_table->crgb_thresh[5] = bswap16_based_on_endian(big_endian, 0x1e72);
+ ram_table->crgb_thresh[6] = bswap16_based_on_endian(big_endian, 0x20f0);
+ ram_table->crgb_thresh[7] = bswap16_based_on_endian(big_endian, 0x232b);
+ ram_table->crgb_offset[0] = bswap16_based_on_endian(big_endian, 0x2999);
+ ram_table->crgb_offset[1] = bswap16_based_on_endian(big_endian, 0x3999);
+ ram_table->crgb_offset[2] = bswap16_based_on_endian(big_endian, 0x4666);
+ ram_table->crgb_offset[3] = bswap16_based_on_endian(big_endian, 0x5999);
+ ram_table->crgb_offset[4] = bswap16_based_on_endian(big_endian, 0x6333);
+ ram_table->crgb_offset[5] = bswap16_based_on_endian(big_endian, 0x7800);
+ ram_table->crgb_offset[6] = bswap16_based_on_endian(big_endian, 0x8c00);
+ ram_table->crgb_offset[7] = bswap16_based_on_endian(big_endian, 0xa000);
+ ram_table->crgb_slope[0] = bswap16_based_on_endian(big_endian, 0x3609);
+ ram_table->crgb_slope[1] = bswap16_based_on_endian(big_endian, 0x2dfa);
+ ram_table->crgb_slope[2] = bswap16_based_on_endian(big_endian, 0x27ea);
+ ram_table->crgb_slope[3] = bswap16_based_on_endian(big_endian, 0x235d);
+ ram_table->crgb_slope[4] = bswap16_based_on_endian(big_endian, 0x2042);
+ ram_table->crgb_slope[5] = bswap16_based_on_endian(big_endian, 0x1dc3);
+ ram_table->crgb_slope[6] = bswap16_based_on_endian(big_endian, 0x1b1a);
+ ram_table->crgb_slope[7] = bswap16_based_on_endian(big_endian, 0x1910);
fill_backlight_transform_table_v_2_2(
params, ram_table, big_endian);