diff options
| author | Hersen Wu <hersenxs.wu@amd.com> | 2018-10-09 13:50:10 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2018-10-10 14:47:24 -0500 |
| commit | 66f34aeec2510b755e8b928b0d8aec8a4095a227 (patch) | |
| tree | de07856e8ac8feff99204ab4d180d783fd2985d9 /drivers/gpu/drm/amd/display/dc | |
| parent | d567cc55c0a9bd2744d5f32e3090e55f9e0c0a40 (diff) | |
drm/amd/display: RV2 DP MST 2nd display within daisy chain not light up
RV2 resource is limit to 3 pipes. Limitation should apply to all HW
blocks instead of front pipe.
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c index 563847c2dd42..a71453a15ae3 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c @@ -507,6 +507,18 @@ static const struct resource_caps res_cap = { .num_ddc = 4, }; +#if defined(CONFIG_DRM_AMD_DC_DCN1_01) +static const struct resource_caps rv2_res_cap = { + .num_timing_generator = 3, + .num_opp = 3, + .num_video_plane = 3, + .num_audio = 3, + .num_stream_encoder = 3, + .num_pll = 3, + .num_ddc = 3, +}; +#endif + static const struct dc_debug_options debug_defaults_drv = { .sanity_checks = true, .disable_dmcu = true, @@ -1172,7 +1184,12 @@ static bool construct( ctx->dc_bios->regs = &bios_regs; - pool->base.res_cap = &res_cap; +#if defined(CONFIG_DRM_AMD_DC_DCN1_01) + if (ctx->dce_version == DCN_VERSION_1_01) + pool->base.res_cap = &rv2_res_cap; + else +#endif + pool->base.res_cap = &res_cap; pool->base.funcs = &dcn10_res_pool_funcs; /* |