diff options
| author | Alex Deucher <alexander.deucher@amd.com> | 2020-11-02 15:37:34 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-11-04 17:11:37 -0500 |
| commit | 20f2ffe504728612d7b0c34e4f8280e34251e704 (patch) | |
| tree | ab97de569be30e009ba6e5087f3f6c775167e46c /drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h | |
| parent | aeee2a48ec9239790b7c9a5c14dfb2a12554322f (diff) | |
drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)
Avoids confusion in configurations.
v2: fix build when CONFIG_DRM_AMD_DC_DCN is disabled
v3: rebase on latest code
Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> (v1)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h index 4a2c93087459..f501c02c244b 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h @@ -157,11 +157,9 @@ uint32_t VBLANK_PARAMETERS_5;\ uint32_t VBLANK_PARAMETERS_6 -#if defined(CONFIG_DRM_AMD_DC_DCN3_0) #define DCN30_HUBP_REG_COMMON_VARIABLE_LIST \ DCN21_HUBP_REG_COMMON_VARIABLE_LIST;\ uint32_t DCN_DMDATA_VM_CNTL -#endif #define DCN2_HUBP_REG_FIELD_VARIABLE_LIST(type) \ DCN_HUBP_REG_FIELD_BASE_LIST(type); \ @@ -198,7 +196,6 @@ type REFCYC_PER_META_CHUNK_FLIP_C; \ type VM_GROUP_SIZE -#if defined(CONFIG_DRM_AMD_DC_DCN3_0) #define DCN30_HUBP_REG_FIELD_VARIABLE_LIST(type) \ DCN21_HUBP_REG_FIELD_VARIABLE_LIST(type);\ type PRIMARY_SURFACE_DCC_IND_BLK;\ @@ -218,32 +215,17 @@ type PACK_3TO2_ELEMENT_DISABLE; \ type ROW_TTU_MODE; \ type NUM_PKRS -#endif struct dcn_hubp2_registers { -#if defined(CONFIG_DRM_AMD_DC_DCN3_0) DCN30_HUBP_REG_COMMON_VARIABLE_LIST; -#else - DCN21_HUBP_REG_COMMON_VARIABLE_LIST; -#endif }; struct dcn_hubp2_shift { -#if defined(CONFIG_DRM_AMD_DC_DCN3_0) DCN30_HUBP_REG_FIELD_VARIABLE_LIST(uint8_t); -#else - DCN21_HUBP_REG_FIELD_VARIABLE_LIST(uint8_t); -#endif - }; struct dcn_hubp2_mask { -#if defined(CONFIG_DRM_AMD_DC_DCN3_0) DCN30_HUBP_REG_FIELD_VARIABLE_LIST(uint32_t); -#else - DCN21_HUBP_REG_FIELD_VARIABLE_LIST(uint32_t); -#endif - }; struct dcn20_hubp { |