summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
diff options
context:
space:
mode:
authorLewis Huang <Lewis.Huang@amd.com>2018-10-18 17:52:19 +0800
committerAlex Deucher <alexander.deucher@amd.com>2018-11-05 14:21:45 -0500
commitd2b1d6bbc56afab8ebae9d52d7ca0ea3569bd600 (patch)
tree2391c23793bd94192f277c16291dd780a2399b1d /drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
parentff83a9a0d15d3be46b3288346a1180777f1a4e41 (diff)
drm/amd/display: Add condition to sync eDP SW status and HW status
[Why] Need to disable EDP backlight when enter S4 with EDP only and resume from S4 with secondary only. [How] Align the real hw and sw state via vBios scratch register in function enable_accelerated_mode when resume from S4. Signed-off-by: Lewis Huang <Lewis.Huang@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
index acb917ddaba9..47dbe4bb294a 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
@@ -438,6 +438,7 @@ static const struct dcn_optc_mask tg_mask = {
static const struct bios_registers bios_regs = {
+ NBIO_SR(BIOS_SCRATCH_0),
NBIO_SR(BIOS_SCRATCH_3),
NBIO_SR(BIOS_SCRATCH_6)
};