diff options
| author | Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> | 2018-02-16 13:18:59 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2018-03-14 16:01:14 -0500 |
| commit | 17ac50368f83ead67f9e3c9b9704f927f214da9d (patch) | |
| tree | 4fc3ecac9b646ec425476c28f59873b22428a3ef /drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | |
| parent | 14d6f644368de1a890b747547f36cef0423fbec8 (diff) | |
drm/amd/display: clean up dcn pplib notification call
We have unused variables being populated when notifying pplib.
This change amends that.
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 35 |
1 files changed, 7 insertions, 28 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c index 9f9b910b7f6d..4365906b14ee 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c @@ -1703,7 +1703,7 @@ static void update_dchubp_dpp( * divided by 2 */ if (plane_state->update_flags.bits.full_update) { - bool should_divided_by_2 = context->bw.dcn.calc_clk.max_dppclk_khz <= + bool should_divided_by_2 = context->bw.dcn.calc_clk.dppclk_khz <= context->bw.dcn.cur_clk.dispclk_khz / 2; dpp->funcs->dpp_dppclk_control( @@ -1711,7 +1711,7 @@ static void update_dchubp_dpp( should_divided_by_2, true); - dc->current_state->bw.dcn.cur_clk.max_dppclk_khz = + dc->current_state->bw.dcn.cur_clk.dppclk_khz = should_divided_by_2 ? context->bw.dcn.cur_clk.dispclk_khz / 2 : context->bw.dcn.cur_clk.dispclk_khz; @@ -1904,16 +1904,10 @@ static void dcn10_pplib_apply_display_requirements( { struct dm_pp_display_configuration *pp_display_cfg = &context->pp_display_cfg; - pp_display_cfg->all_displays_in_sync = false;/*todo*/ - pp_display_cfg->nb_pstate_switch_disable = false; pp_display_cfg->min_engine_clock_khz = context->bw.dcn.cur_clk.dcfclk_khz; pp_display_cfg->min_memory_clock_khz = context->bw.dcn.cur_clk.fclk_khz; pp_display_cfg->min_engine_clock_deep_sleep_khz = context->bw.dcn.cur_clk.dcfclk_deep_sleep_khz; pp_display_cfg->min_dcfc_deep_sleep_clock_khz = context->bw.dcn.cur_clk.dcfclk_deep_sleep_khz; - pp_display_cfg->avail_mclk_switch_time_us = - context->bw.dcn.cur_clk.dram_ccm_us > 0 ? context->bw.dcn.cur_clk.dram_ccm_us : 0; - pp_display_cfg->avail_mclk_switch_time_in_disp_active_us = - context->bw.dcn.cur_clk.min_active_dram_ccm_us > 0 ? context->bw.dcn.cur_clk.min_active_dram_ccm_us : 0; pp_display_cfg->min_dcfclock_khz = context->bw.dcn.cur_clk.dcfclk_khz; pp_display_cfg->disp_clk_khz = context->bw.dcn.cur_clk.dispclk_khz; dce110_fill_display_configs(context, pp_display_cfg); @@ -2126,12 +2120,12 @@ static inline bool should_set_clock(bool decrease_allowed, int calc_clk, int cur static int determine_dppclk_threshold(struct dc *dc, struct dc_state *context) { bool request_dpp_div = context->bw.dcn.calc_clk.dispclk_khz > - context->bw.dcn.calc_clk.max_dppclk_khz; + context->bw.dcn.calc_clk.dppclk_khz; bool dispclk_increase = context->bw.dcn.calc_clk.dispclk_khz > context->bw.dcn.cur_clk.dispclk_khz; int disp_clk_threshold = context->bw.dcn.calc_clk.max_supported_dppclk_khz; bool cur_dpp_div = context->bw.dcn.cur_clk.dispclk_khz > - context->bw.dcn.cur_clk.max_dppclk_khz; + context->bw.dcn.cur_clk.dppclk_khz; /* increase clock, looking for div is 0 for current, request div is 1*/ if (dispclk_increase) { @@ -2176,7 +2170,7 @@ static void ramp_up_dispclk_with_dpp(struct dc *dc, struct dc_state *context) { int i; bool request_dpp_div = context->bw.dcn.calc_clk.dispclk_khz > - context->bw.dcn.calc_clk.max_dppclk_khz; + context->bw.dcn.calc_clk.dppclk_khz; int dispclk_to_dpp_threshold = determine_dppclk_threshold(dc, context); @@ -2207,8 +2201,8 @@ static void ramp_up_dispclk_with_dpp(struct dc *dc, struct dc_state *context) context->bw.dcn.cur_clk.dispclk_khz = context->bw.dcn.calc_clk.dispclk_khz; - context->bw.dcn.cur_clk.max_dppclk_khz = - context->bw.dcn.calc_clk.max_dppclk_khz; + context->bw.dcn.cur_clk.dppclk_khz = + context->bw.dcn.calc_clk.dppclk_khz; context->bw.dcn.cur_clk.max_supported_dppclk_khz = context->bw.dcn.calc_clk.max_supported_dppclk_khz; } @@ -2275,21 +2269,6 @@ static void dcn10_set_bandwidth( ramp_up_dispclk_with_dpp(dc, context); } - /* Decrease in freq is increase in period so opposite comparison for dram_ccm */ - if ((decrease_allowed && context->bw.dcn.calc_clk.dram_ccm_us - > dc->current_state->bw.dcn.cur_clk.dram_ccm_us) || - context->bw.dcn.calc_clk.dram_ccm_us - < dc->current_state->bw.dcn.cur_clk.dram_ccm_us) { - context->bw.dcn.cur_clk.dram_ccm_us = - context->bw.dcn.calc_clk.dram_ccm_us; - } - if ((decrease_allowed && context->bw.dcn.calc_clk.min_active_dram_ccm_us - > dc->current_state->bw.dcn.cur_clk.min_active_dram_ccm_us) || - context->bw.dcn.calc_clk.min_active_dram_ccm_us - < dc->current_state->bw.dcn.cur_clk.min_active_dram_ccm_us) { - context->bw.dcn.cur_clk.min_active_dram_ccm_us = - context->bw.dcn.calc_clk.min_active_dram_ccm_us; - } dcn10_pplib_apply_display_requirements(dc, context); if (dc->debug.sanity_checks) { |