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authorFeifei Xu <Feifei.Xu@amd.com>2018-01-26 15:10:55 +0800
committerAlex Deucher <alexander.deucher@amd.com>2018-05-17 10:13:17 -0500
commitf980d127dba80214b4d793942492d3a4e6c46be0 (patch)
treec790aaba0dc0dbd16b04bcf4ed74eb0f100bcefe /drivers/gpu/drm/amd/amdgpu
parent935be7a0ce4e181a23fc840861088e79dcb3dc08 (diff)
drm/amdgpu/soc15: Set common clockgating for vega20.
Same as vega10 for now. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/soc15.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index f45bea84a73e..1fd75f5aa22b 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -875,6 +875,7 @@ static int soc15_common_set_clockgating_state(void *handle,
switch (adev->asic_type) {
case CHIP_VEGA10:
case CHIP_VEGA12:
+ case CHIP_VEGA20:
adev->nbio_funcs->update_medium_grain_clock_gating(adev,
state == AMD_CG_STATE_GATE ? true : false);
adev->nbio_funcs->update_medium_grain_light_sleep(adev,