diff options
| author | Alex Deucher <alexander.deucher@amd.com> | 2017-06-07 11:05:26 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2017-06-07 15:43:28 -0400 |
| commit | 41f6a99abdb423691b24c12f0a0578755b2c1126 (patch) | |
| tree | d3c6b25e148ef331cb29abe10fb2bd9a6f617dd4 /drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | |
| parent | cf8b611f55a775cc6514485e7dccf1c0e85b938d (diff) | |
drm/amdgpu: move gfx_v*_0_compute_queue_acquire to common code
Same function was duplicated in all gfx IP files.
Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 39 |
1 files changed, 1 insertions, 38 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 9d675b37883d..3ea0e716360d 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c @@ -857,43 +857,6 @@ static void gfx_v9_0_mec_fini(struct amdgpu_device *adev) } } -static void gfx_v9_0_compute_queue_acquire(struct amdgpu_device *adev) -{ - int i, queue, pipe, mec; - - /* policy for amdgpu compute queue ownership */ - for (i = 0; i < AMDGPU_MAX_COMPUTE_QUEUES; ++i) { - queue = i % adev->gfx.mec.num_queue_per_pipe; - pipe = (i / adev->gfx.mec.num_queue_per_pipe) - % adev->gfx.mec.num_pipe_per_mec; - mec = (i / adev->gfx.mec.num_queue_per_pipe) - / adev->gfx.mec.num_pipe_per_mec; - - /* we've run out of HW */ - if (mec >= adev->gfx.mec.num_mec) - break; - - if (adev->gfx.mec.num_mec > 1) { - /* policy: amdgpu owns the first two queues of the first MEC */ - if (mec == 0 && queue < 2) - set_bit(i, adev->gfx.mec.queue_bitmap); - } else { - /* policy: amdgpu owns all queues in the first pipe */ - if (mec == 0 && pipe == 0) - set_bit(i, adev->gfx.mec.queue_bitmap); - } - } - - /* update the number of active compute rings */ - adev->gfx.num_compute_rings = - bitmap_weight(adev->gfx.mec.queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES); - - /* If you hit this case and edited the policy, you probably just - * need to increase AMDGPU_MAX_COMPUTE_RINGS */ - if (WARN_ON(adev->gfx.num_compute_rings > AMDGPU_MAX_COMPUTE_RINGS)) - adev->gfx.num_compute_rings = AMDGPU_MAX_COMPUTE_RINGS; -} - static int gfx_v9_0_mec_init(struct amdgpu_device *adev) { int r; @@ -920,7 +883,7 @@ static int gfx_v9_0_mec_init(struct amdgpu_device *adev) adev->gfx.mec.num_queue_per_pipe = 8; /* take ownership of the relevant compute queues */ - gfx_v9_0_compute_queue_acquire(adev); + amdgpu_gfx_compute_queue_acquire(adev); mec_hpd_size = adev->gfx.num_compute_rings * GFX9_MEC_HPD_SIZE; if (adev->gfx.mec.hpd_eop_obj == NULL) { |