diff options
| author | Alex Deucher <alexander.deucher@amd.com> | 2015-10-07 23:46:49 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2015-10-14 16:16:34 -0400 |
| commit | a2df42da61109653782949789ffe6c358e5d2685 (patch) | |
| tree | 69da5b7c4b42abd536dc9513256f9fc521e174a8 /drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | |
| parent | 72b400675a900e80a75cad57db6aa726c68ffb3f (diff) | |
drm/amdgpu/dce8: Fold set_cursor() into show_cursor()
Port of radeon commit:
8991668ab4e26f985a8485719bce5d6d0623a644
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/dce_v8_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 18 |
1 files changed, 5 insertions, 13 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c index aebfe3cd6c2d..0d2c50d41f54 100644 --- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c @@ -2411,6 +2411,11 @@ static void dce_v8_0_show_cursor(struct drm_crtc *crtc) struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); struct amdgpu_device *adev = crtc->dev->dev_private; + WREG32(mmCUR_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset, + upper_32_bits(amdgpu_crtc->cursor_addr)); + WREG32(mmCUR_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset, + lower_32_bits(amdgpu_crtc->cursor_addr)); + WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, CUR_CONTROL__CURSOR_EN_MASK | (CURSOR_24_8_PRE_MULT << CUR_CONTROL__CURSOR_MODE__SHIFT) | @@ -2449,17 +2454,6 @@ static int dce_v8_0_cursor_move_locked(struct drm_crtc *crtc, return 0; } -static void dce_v8_0_set_cursor(struct drm_crtc *crtc) -{ - struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); - struct amdgpu_device *adev = crtc->dev->dev_private; - - WREG32(mmCUR_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset, - upper_32_bits(amdgpu_crtc->cursor_addr)); - WREG32(mmCUR_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset, - lower_32_bits(amdgpu_crtc->cursor_addr)); -} - static int dce_v8_0_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) { @@ -2537,7 +2531,6 @@ static int dce_v8_0_crtc_cursor_set2(struct drm_crtc *crtc, amdgpu_crtc->cursor_hot_y = hot_y; } - dce_v8_0_set_cursor(crtc); dce_v8_0_show_cursor(crtc); dce_v8_0_lock_cursor(crtc, false); @@ -2566,7 +2559,6 @@ static void dce_v8_0_cursor_reset(struct drm_crtc *crtc) dce_v8_0_cursor_move_locked(crtc, amdgpu_crtc->cursor_x, amdgpu_crtc->cursor_y); - dce_v8_0_set_cursor(crtc); dce_v8_0_show_cursor(crtc); dce_v8_0_lock_cursor(crtc, false); |