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authorAndreas Schallenberg <Andreas.Schallenberg@3alitytechnica.com>2012-05-21 09:52:43 +0200
committerGrant Likely <grant.likely@secretlab.ca>2012-05-25 18:50:41 -0600
commit96b70641b937e99c1579cb6ebbcdb7b0af98cdd0 (patch)
treec2a31be5f5160f345b5f3f1c450d01b158dc8b96 /drivers/gpio
parent0df2c999f748c9528f6629f45baaa86118d60cd1 (diff)
gpio/tca6424: merge I2C transactions, remove cast
This is a follow-up to ae79c1904 "[PATCH v2] Add support for TCA6424" merged in the v3.5 merge window. It fixes comments made when the patch was merged. - Use 3 byte transfers instead of two separate transfers (2+1 byte) - An unnecessary cast removed Signed-off-by: Andreas Schallenberg <Andreas.Schallenberg@3alitytechnica.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'drivers/gpio')
-rw-r--r--drivers/gpio/gpio-pca953x.c28
1 files changed, 16 insertions, 12 deletions
diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
index 1c313c710be3..de24af202447 100644
--- a/drivers/gpio/gpio-pca953x.c
+++ b/drivers/gpio/gpio-pca953x.c
@@ -98,12 +98,11 @@ static int pca953x_write_reg(struct pca953x_chip *chip, int reg, u32 val)
if (chip->gpio_chip.ngpio <= 8)
ret = i2c_smbus_write_byte_data(chip->client, reg, val);
else if (chip->gpio_chip.ngpio == 24) {
- ret = i2c_smbus_write_word_data(chip->client,
+ cpu_to_le32s(&val);
+ ret = i2c_smbus_write_i2c_block_data(chip->client,
(reg << 2) | REG_ADDR_AI,
- val & 0xffff);
- ret = i2c_smbus_write_byte_data(chip->client,
- (reg << 2) + 2,
- (val & 0xff0000) >> 16);
+ 3,
+ (u8 *) &val);
}
else {
switch (chip->chip_type) {
@@ -135,22 +134,27 @@ static int pca953x_read_reg(struct pca953x_chip *chip, int reg, u32 *val)
{
int ret;
- if (chip->gpio_chip.ngpio <= 8)
+ if (chip->gpio_chip.ngpio <= 8) {
ret = i2c_smbus_read_byte_data(chip->client, reg);
- else if (chip->gpio_chip.ngpio == 24) {
- ret = i2c_smbus_read_word_data(chip->client, reg << 2);
- ret |= (i2c_smbus_read_byte_data(chip->client,
- (reg << 2) + 2)<<16);
+ *val = ret;
}
- else
+ else if (chip->gpio_chip.ngpio == 24) {
+ *val = 0;
+ ret = i2c_smbus_read_i2c_block_data(chip->client,
+ (reg << 2) | REG_ADDR_AI,
+ 3,
+ (u8 *) val);
+ le32_to_cpus(val);
+ } else {
ret = i2c_smbus_read_word_data(chip->client, reg << 1);
+ *val = ret;
+ }
if (ret < 0) {
dev_err(&chip->client->dev, "failed reading register\n");
return ret;
}
- *val = (u32)ret;
return 0;
}