diff options
| author | Haojian Zhuang <haojian.zhuang@linaro.org> | 2013-02-17 19:42:47 +0800 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2013-03-07 05:27:29 +0100 |
| commit | 86853c83e33738397564e9377ceeff94d4bc041c (patch) | |
| tree | 94b4df911227c48b62ace647d0989a2b4da0d019 /drivers/gpio | |
| parent | e3929714942b242ecb55657e70d51e0eb4c77726 (diff) | |
gpio: add gpio offset in gpio range cells property
Add gpio offset into "gpio-range-cells" property. It's used to support
sparse pinctrl range in gpio chip.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio')
| -rw-r--r-- | drivers/gpio/gpiolib-of.c | 15 |
1 files changed, 2 insertions, 13 deletions
diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c index a71a54a3e3f7..892040ad0095 100644 --- a/drivers/gpio/gpiolib-of.c +++ b/drivers/gpio/gpiolib-of.c @@ -203,22 +203,11 @@ static void of_gpiochip_add_pin_range(struct gpio_chip *chip) if (!pctldev) break; - /* - * This assumes that the n GPIO pins are consecutive in the - * GPIO number space, and that the pins are also consecutive - * in their local number space. Currently it is not possible - * to add different ranges for one and the same GPIO chip, - * as the code assumes that we have one consecutive range - * on both, mapping 1-to-1. - * - * TODO: make the OF bindings handle multiple sparse ranges - * on the same GPIO chip. - */ ret = gpiochip_add_pin_range(chip, pinctrl_dev_get_devname(pctldev), - 0, /* offset in gpiochip */ pinspec.args[0], - pinspec.args[1]); + pinspec.args[1], + pinspec.args[2]); if (ret) break; |