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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2021-05-10 22:46:33 +0300
committerBartosz Golaszewski <bgolaszewski@baylibre.com>2021-05-12 13:54:27 +0200
commit6453b9532b5f77d19837b159c4d074f0af9f141b (patch)
treeef935ccfcbf1e12c43bb2e23272a8e2407a01e48 /drivers/gpio
parent02b3f84d9080b0f4297f31258307f626a43faba5 (diff)
gpio: xilinx: No need to disable IRQs in the handler
In IRQ handler interrupts are already disabled, hence no need to repeat it. Even in the threaded case, it is not a problem because IRQ framework keeps interrupt disabled there as well. Remove disabling IRQ part in the handler. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Neeli Srinivas <sneeli@xilinx.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Diffstat (limited to 'drivers/gpio')
-rw-r--r--drivers/gpio/gpio-xilinx.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c
index 01e6459b27e6..0c43baa54b5b 100644
--- a/drivers/gpio/gpio-xilinx.c
+++ b/drivers/gpio/gpio-xilinx.c
@@ -509,14 +509,13 @@ static void xgpio_irqhandler(struct irq_desc *desc)
int irq_offset;
u32 status;
u32 bit;
- unsigned long flags;
status = xgpio_readreg(chip->regs + XGPIO_IPISR_OFFSET);
xgpio_writereg(chip->regs + XGPIO_IPISR_OFFSET, status);
chained_irq_enter(irqchip, desc);
- spin_lock_irqsave(&chip->gpio_lock, flags);
+ spin_lock(&chip->gpio_lock);
xgpio_read_ch_all(chip, XGPIO_DATA_OFFSET, all);
@@ -533,7 +532,7 @@ static void xgpio_irqhandler(struct irq_desc *desc)
bitmap_copy(chip->last_irq_read, all, 64);
bitmap_or(all, rising, falling, 64);
- spin_unlock_irqrestore(&chip->gpio_lock, flags);
+ spin_unlock(&chip->gpio_lock);
dev_dbg(gc->parent, "IRQ rising %*pb falling %*pb\n", 64, rising, 64, falling);