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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2020-09-17 15:32:03 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2020-09-17 15:32:03 +0200 |
| commit | 776e4ad0a04212ae37363f21d5589b5db9fea68e (patch) | |
| tree | 9a2a1865096f313db0767e3fe6d745fa1d71a8c2 /drivers/edac/sifive_edac.c | |
| parent | 8b652aa8a1fb02c596494d3cbcad7c916d2ecee6 (diff) | |
| parent | fa2d185f7518423ffcdba617ad09ff77ac51f198 (diff) | |
Merge tag 'renesas-r8a779a0-dt-binding-defs-tag' into clk-renesas-for-v5.10
Renesas R-Car V3U DT Binding Definitions
Clock and Power Domain definitions for the Renesas R-Car V3U (R8A779A0)
SoC, shared by driver and DT source files.
Diffstat (limited to 'drivers/edac/sifive_edac.c')
0 files changed, 0 insertions, 0 deletions