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authorShun-Chih Yu <shun-chih.yu@mediatek.com>2019-04-25 11:53:50 +0800
committerVinod Koul <vkoul@kernel.org>2019-04-26 17:26:38 +0530
commit5bb5c3a3ac102158b799bf5eda871223aa5e9c25 (patch)
treeeeab3b4f482aa00ac6542ab8e5468a67f9580a82 /drivers/dma/mediatek/mtk-cqdma.c
parent6e7da74775348d96e2d7efaf3f91410e18c481ef (diff)
dmaengine: mediatek-cqdma: fix wrong register usage in mtk_cqdma_start
This patch fixes wrong register usage in the mtk_cqdma_start. The destination register should be MTK_CQDMA_DST2 instead. Fixes: b1f01e48df5a ("dmaengine: mediatek: Add MediaTek Command-Queue DMA controller for MT6765 SoC") Signed-off-by: Shun-Chih Yu <shun-chih.yu@mediatek.com> Cc: stable@vger.kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/dma/mediatek/mtk-cqdma.c')
-rw-r--r--drivers/dma/mediatek/mtk-cqdma.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/dma/mediatek/mtk-cqdma.c b/drivers/dma/mediatek/mtk-cqdma.c
index 131f3974740d..814853842e29 100644
--- a/drivers/dma/mediatek/mtk-cqdma.c
+++ b/drivers/dma/mediatek/mtk-cqdma.c
@@ -253,7 +253,7 @@ static void mtk_cqdma_start(struct mtk_cqdma_pchan *pc,
#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
mtk_dma_set(pc, MTK_CQDMA_DST2, cvd->dest >> MTK_CQDMA_ADDR2_SHFIT);
#else
- mtk_dma_set(pc, MTK_CQDMA_SRC2, 0);
+ mtk_dma_set(pc, MTK_CQDMA_DST2, 0);
#endif
/* setup the length */