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authorShukun Tan <tanshukun1@huawei.com>2020-05-09 17:44:03 +0800
committerHerbert Xu <herbert@gondor.apana.org.au>2020-05-15 16:15:03 +1000
commit3176637ac10eddffdc3bd75281fa354a0d5a0c1e (patch)
tree01a582303542308c5ed017c1978f15517c38d6e6 /drivers/crypto/hisilicon/qm.h
parent5308f6600a393ee848ed9d9f77b167aa6b202e9c (diff)
crypto: hisilicon - remove codes of directly report device errors through MSI
The hardware device can be configured to report directly through MSI, but this method will not go through RAS, configure all hardware errors that should be processed by driver to NFE. Signed-off-by: Shukun Tan <tanshukun1@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/hisilicon/qm.h')
-rw-r--r--drivers/crypto/hisilicon/qm.h4
1 files changed, 1 insertions, 3 deletions
diff --git a/drivers/crypto/hisilicon/qm.h b/drivers/crypto/hisilicon/qm.h
index 80b9746dfe19..fc5e96a02399 100644
--- a/drivers/crypto/hisilicon/qm.h
+++ b/drivers/crypto/hisilicon/qm.h
@@ -74,7 +74,7 @@
#define QM_BASE_NFE (QM_AXI_RRESP | QM_AXI_BRESP | QM_ECC_MBIT | \
QM_ACC_GET_TASK_TIMEOUT | QM_DB_TIMEOUT | \
- QM_OF_FIFO_OF)
+ QM_OF_FIFO_OF | QM_DB_RANDOM_INVALID)
#define QM_BASE_CE QM_ECC_1BIT
#define QM_Q_DEPTH 1024
@@ -158,7 +158,6 @@ struct hisi_qm_err_info {
u32 ce;
u32 nfe;
u32 fe;
- u32 msi;
};
struct hisi_qm_err_status {
@@ -224,7 +223,6 @@ struct hisi_qm {
struct qm_debug debug;
u32 error_mask;
- u32 msi_mask;
struct workqueue_struct *wq;
struct work_struct work;