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| author | Bjorn Helgaas <bhelgaas@google.com> | 2018-10-20 11:45:45 -0500 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2018-10-20 11:45:45 -0500 |
| commit | 61ce5809570b38710f08ebfcd44a5b067eeee77d (patch) | |
| tree | f63539d2bbb6b2c7a5d864eb3b711dd2c57407c1 /drivers/cpufreq/s5pv210-cpufreq.c | |
| parent | 6aa0459e75b71eee94c91f414c45a2d724997154 (diff) | |
| parent | e81e36a96bb56f243b5ac1d114c37c086761595b (diff) | |
Merge branch 'remotes/lorenzo/pci/cadence'
- Fix Cadence PHY handling during probe (Alan Douglas)
- Signal Cadence Endpoint interrupts via AXI region 0 instead of last
region (Alan Douglas)
- Write Cadence Endpoint MSI interrupts with 32 bits of data (Alan
Douglas)
* remotes/lorenzo/pci/cadence:
PCI: cadence: Write MSI data with 32bits
PCI: cadence: Use AXI region 0 to signal interrupts from EP
PCI: cadence: Correct probe behaviour when failing to get PHY
Diffstat (limited to 'drivers/cpufreq/s5pv210-cpufreq.c')
0 files changed, 0 insertions, 0 deletions