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author | Minh Tran <minhduc.tran@emulex.com> | 2014-12-07 16:09:52 +0200 |
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committer | Roland Dreier <roland@purestorage.com> | 2014-12-15 18:11:44 -0800 |
commit | f4641ef701d41929e0674f114e47a6824761e5b1 (patch) | |
tree | 212c1b711ea636ccc736cf44a2c00d411e42aede /drivers/cpufreq/davinci-cpufreq.c | |
parent | 70e71ca0af244f48a5dcf56dc435243792e3a495 (diff) |
IB/iser: Re-adjust CQ and QP send ring sizes to HW limits
Re-adjust max CQEs per CQ and max send_wr per QP according
to the resource limits supported by underlying hardware.
Signed-off-by: Minh Tran <minhduc.tran@emulex.com>
Signed-off-by: Jayamohan Kallickal <jayamohan.kallickal@emulex.com>
Acked-by: Sagi Grimberg <sagig@mellanox.com>
Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: Roland Dreier <roland@purestorage.com>
Diffstat (limited to 'drivers/cpufreq/davinci-cpufreq.c')
0 files changed, 0 insertions, 0 deletions