diff options
| author | Stephen Boyd <sboyd@kernel.org> | 2020-09-15 09:17:57 -0700 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2020-09-15 09:17:57 -0700 |
| commit | e56b4d4cc5029bd39347ff7ee559f66d6b25ca98 (patch) | |
| tree | fffd9b30e123c854664e60b6a2eaccd8239b5851 /drivers/clk | |
| parent | d2249bf25c565b6e310453962fef63f8d38677a6 (diff) | |
| parent | 0212a0483b0a36cc94cfab882b3edbb41fcfe1cd (diff) | |
Merge tag 'v5.9-clk-samsung-fixes' of https://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk into clk-fixes
Pull a Samsung clk driver fix from Sylwester Nawrocki:
- fix for a regression in v5.9-rc1 on Odroid XU3/XU4, i.e. booting
failure due to the DRAM controller root clock being disabled
* tag 'v5.9-clk-samsung-fixes' of https://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk:
clk: samsung: Keep top BPLL mux on Exynos542x enabled
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/samsung/clk-exynos5420.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index fea33399a632..bd620876544d 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -1655,6 +1655,11 @@ static void __init exynos5x_clk_init(struct device_node *np, * main G3D clock enablement status. */ clk_prepare_enable(__clk_lookup("mout_sw_aclk_g3d")); + /* + * Keep top BPLL mux enabled permanently to ensure that DRAM operates + * properly. + */ + clk_prepare_enable(__clk_lookup("mout_bpll")); samsung_clk_of_add_provider(np, ctx); } |