diff options
author | Khiem Nguyen <khiem.nguyen.xt@rvc.renesas.com> | 2016-06-19 09:34:18 +0700 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2016-06-21 09:21:06 +0200 |
commit | e4c82863fd17bacb60080481c11eb0303d3f83d0 (patch) | |
tree | ce9f2a0dd6018da995361b2ca07273f4bfb43477 /drivers/clk | |
parent | 7d6cc0cddbc2f1953b2ff6f5930a065e40b94507 (diff) |
clk: renesas: r8a7795: Add THS/TSC clock
Signed-off-by: Khiem Nguyen <khiem.nguyen.xt@rvc.renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk')
-rw-r--r-- | drivers/clk/renesas/r8a7795-cpg-mssr.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c index b9485ab891a0..d359c92e13a6 100644 --- a/drivers/clk/renesas/r8a7795-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c @@ -151,6 +151,7 @@ static const struct mssr_mod_clk r8a7795_mod_clks[] __initconst = { DEF_MOD("hscif2", 518, R8A7795_CLK_S3D1), DEF_MOD("hscif1", 519, R8A7795_CLK_S3D1), DEF_MOD("hscif0", 520, R8A7795_CLK_S3D1), + DEF_MOD("thermal", 522, R8A7795_CLK_CP), DEF_MOD("pwm", 523, R8A7795_CLK_S3D4), DEF_MOD("fcpvd3", 600, R8A7795_CLK_S2D1), DEF_MOD("fcpvd2", 601, R8A7795_CLK_S2D1), |