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| author | Nicolas Saenz Julienne <nsaenzjulienne@suse.de> | 2020-07-30 20:26:19 +0200 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2020-08-03 14:26:20 -0700 |
| commit | f34e4651ce66a754f41203284acf09b28b9dd955 (patch) | |
| tree | 441b9e580c048be5e31c40a5ed365a029916effe /drivers/clk/sunxi-ng | |
| parent | 2a08a9232ba2e6103843870e68edae8e381eb02a (diff) | |
clk: bcm2835: Do not use prediv with bcm2711's PLLs
Contrary to previous SoCs, bcm2711 doesn't have a prescaler in the PLL
feedback loop. Bypass it by zeroing fb_prediv_mask when running on
bcm2711.
Note that, since the prediv configuration bits were re-purposed, this
was triggering miscalculations on all clocks hanging from the VPU clock,
notably the aux UART, making its output unintelligible.
Fixes: 42de9ad400af ("clk: bcm2835: Add BCM2711_CLOCK_EMMC2 support")
Reported-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Link: https://lore.kernel.org/r/20200730182619.23246-1-nsaenzjulienne@suse.de
Tested-by: Nathan Chancellor <natechancellor@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/sunxi-ng')
0 files changed, 0 insertions, 0 deletions