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authorHeiko Stübner <heiko@sntech.de>2014-07-03 01:59:39 +0200
committerMike Turquette <mturquette@linaro.org>2014-07-13 12:17:07 -0700
commit85fa0c7f8d05eb6baf2c122e85d45d928df0992b (patch)
treea0617813aaf643e6b80578632bfa58efdc044611 /drivers/clk/rockchip/Makefile
parent90c590254051f511299538c158e12fdad41ce163 (diff)
clk: rockchip: add reset controller
All Rockchip SoCs at least down to the ARM9-based RK28xx include the reset- controller for SoC peripherals in their clock controller. While the older SoCs (ARM9 and Cortex-A8) use a regular scheme to change register values, the Cortex-A9 SoCs use a hiword-mask making locking unecessary. To be compatible with both schemes the reset controller takes a flag to decide which scheme to use, similar to the other HIWORD_MASK flags used in the clock framework. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-By: Max Schwarz <max.schwarz@online.de> Tested-By: Max Schwarz <max.schwarz@online.de> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/rockchip/Makefile')
-rw-r--r--drivers/clk/rockchip/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile
index 2cb916496040..85f8a551fc1a 100644
--- a/drivers/clk/rockchip/Makefile
+++ b/drivers/clk/rockchip/Makefile
@@ -5,3 +5,4 @@
obj-y += clk-rockchip.o
obj-y += clk.o
obj-y += clk-pll.o
+obj-$(CONFIG_RESET_CONTROLLER) += softrst.o