diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2018-11-21 10:43:42 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2018-12-04 10:29:43 +0100 |
| commit | f51389cb6a976e1a6edd0289ea5406c462021bc5 (patch) | |
| tree | 5808cf8110842e9322362b706637ae8d1f23166b /drivers/clk/renesas | |
| parent | b9c0ba6614bc19844c2ab345c10e8116c78de772 (diff) | |
clk: renesas: r8a7796: Add CPEX clock
Implement support for the CPEX clock on R-Car M3-W. This clock can be
selected as a clock source for CMT1 (Compare Match Timer Type 1).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/renesas')
| -rw-r--r-- | drivers/clk/renesas/r8a7796-cpg-mssr.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c index 10567386e6dd..12c455859f2c 100644 --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c @@ -103,6 +103,7 @@ static const struct cpg_core_clk r8a7796_core_clks[] __initconst = { DEF_FIXED("cl", R8A7796_CLK_CL, CLK_PLL1_DIV2, 48, 1), DEF_FIXED("cp", R8A7796_CLK_CP, CLK_EXTAL, 2, 1), + DEF_FIXED("cpex", R8A7796_CLK_CPEX, CLK_EXTAL, 2, 1), DEF_DIV6P1("canfd", R8A7796_CLK_CANFD, CLK_PLL1_DIV4, 0x244), DEF_DIV6P1("csi0", R8A7796_CLK_CSI0, CLK_PLL1_DIV4, 0x00c), |