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authorKieran Bingham <kieran.bingham+renesas@ideasonboard.com>2020-12-16 15:19:30 +0000
committerGeert Uytterhoeven <geert+renesas@glider.be>2020-12-28 10:45:17 +0100
commited447e7d60de9ee28763a9e0d215267db7498639 (patch)
tree0909bd780f1f4e3a220213622989cc29273c8358 /drivers/clk/renesas
parent0177b5090effab70762c774b860df8d298e62ff4 (diff)
clk: renesas: r8a779a0: Add VSPD clock support
Add clocks for the VSPD modules on the V3U. Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Link: https://lore.kernel.org/r/20201216151931.851547-3-kieran.bingham+renesas@ideasonboard.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk/renesas')
-rw-r--r--drivers/clk/renesas/r8a779a0-cpg-mssr.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
index 8160f41191b2..2ce31508db73 100644
--- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
@@ -190,6 +190,8 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = {
DEF_MOD("vin35", 827, R8A779A0_CLK_S1D1),
DEF_MOD("vin36", 828, R8A779A0_CLK_S1D1),
DEF_MOD("vin37", 829, R8A779A0_CLK_S1D1),
+ DEF_MOD("vspd0", 830, R8A779A0_CLK_S3D1),
+ DEF_MOD("vspd1", 831, R8A779A0_CLK_S3D1),
};
static spinlock_t cpg_lock;