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author | Ulrich Hecht <ulrich.hecht+renesas@gmail.com> | 2016-09-14 18:46:46 +0200 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2016-10-17 15:56:20 +0200 |
commit | 951456c37df6d778dc0ce42357417cba440cba87 (patch) | |
tree | c6fef3382ae77ce1822c3b62b938a88bb1de58cc /drivers/clk/renesas | |
parent | cf8fe97cad4a248bc7baaf39ecde2aece72f8618 (diff) |
clk: renesas: r8a7796: Add SCIF clocks
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk/renesas')
-rw-r--r-- | drivers/clk/renesas/r8a7796-cpg-mssr.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c index d94a870de746..37c1e43904ee 100644 --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c @@ -109,6 +109,11 @@ static const struct cpg_core_clk r8a7796_core_clks[] __initconst = { }; static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = { + DEF_MOD("scif5", 202, R8A7796_CLK_S3D4), + DEF_MOD("scif4", 203, R8A7796_CLK_S3D4), + DEF_MOD("scif3", 204, R8A7796_CLK_S3D4), + DEF_MOD("scif1", 206, R8A7796_CLK_S3D4), + DEF_MOD("scif0", 207, R8A7796_CLK_S3D4), DEF_MOD("sys-dmac2", 217, R8A7796_CLK_S0D3), DEF_MOD("sys-dmac1", 218, R8A7796_CLK_S0D3), DEF_MOD("sys-dmac0", 219, R8A7796_CLK_S0D3), |