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authorTakeshi Kihara <takeshi.kihara.df@renesas.com>2018-10-12 16:48:34 +0900
committerGeert Uytterhoeven <geert+renesas@glider.be>2018-12-04 10:29:51 +0100
commit7cf3a216a2b3a672cad3e498c186c9333bdff90a (patch)
tree21d8500e3bd49df0b499dc5a5805cde560703cbb /drivers/clk/renesas
parent396bc9d40d694befa1c2c88f9873afc62a189b5f (diff)
clk: renesas: r8a77990: Correct parent clock of DU
According to the R-Car Gen3 Hardware Manual Rev 1.00, the parent clock of the DU module clocks on R-Car E3 is S1D1. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Fixes: 3570a2af473789c5 ("clk: renesas: cpg-mssr: Add support for R-Car E3") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Diffstat (limited to 'drivers/clk/renesas')
-rw-r--r--drivers/clk/renesas/r8a77990-cpg-mssr.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/renesas/r8a77990-cpg-mssr.c b/drivers/clk/renesas/r8a77990-cpg-mssr.c
index 9eb80180eea0..9a278c75c918 100644
--- a/drivers/clk/renesas/r8a77990-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77990-cpg-mssr.c
@@ -183,8 +183,8 @@ static const struct mssr_mod_clk r8a77990_mod_clks[] __initconst = {
DEF_MOD("ehci0", 703, R8A77990_CLK_S3D4),
DEF_MOD("hsusb", 704, R8A77990_CLK_S3D4),
DEF_MOD("csi40", 716, R8A77990_CLK_CSI0),
- DEF_MOD("du1", 723, R8A77990_CLK_S2D1),
- DEF_MOD("du0", 724, R8A77990_CLK_S2D1),
+ DEF_MOD("du1", 723, R8A77990_CLK_S1D1),
+ DEF_MOD("du0", 724, R8A77990_CLK_S1D1),
DEF_MOD("lvds", 727, R8A77990_CLK_S2D1),
DEF_MOD("vin5", 806, R8A77990_CLK_S1D2),