diff options
| author | Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | 2021-01-18 09:41:56 +0530 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2021-02-08 09:46:23 -0800 |
| commit | f28dec1ab71bddc76fb8931a16d5d42c13a048cc (patch) | |
| tree | ee5f8201f657d26883408b6d0cd0beade832dc52 /drivers/clk/qcom/Makefile | |
| parent | 5a5223ffd7ef721b59be38e2ce83e0a73dbb8942 (diff) | |
clk: qcom: Add SDX55 APCS clock controller support
Add a driver for the SDX55 APCS clock controller. It is part of the APCS
hardware block, which among other things implements also a combined mux
and half integer divider functionality. The APCS clock controller has 3
parent clocks:
1. Board XO
2. Fixed rate GPLL0
3. A7 PLL
This is required for enabling CPU frequency scaling on SDX55-based
platforms.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118041156.50016-6-manivannan.sadhasivam@linaro.org
[sboyd@kernel.org: Fix unused ret in probe by hardcoding it]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/qcom/Makefile')
| -rw-r--r-- | drivers/clk/qcom/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile index e7e0ac382176..4de926da4b15 100644 --- a/drivers/clk/qcom/Makefile +++ b/drivers/clk/qcom/Makefile @@ -47,6 +47,7 @@ obj-$(CONFIG_QCOM_A53PLL) += a53-pll.o obj-$(CONFIG_QCOM_A7PLL) += a7-pll.o obj-$(CONFIG_QCOM_CLK_APCS_MSM8916) += apcs-msm8916.o obj-$(CONFIG_QCOM_CLK_APCC_MSM8996) += clk-cpu-8996.o +obj-$(CONFIG_QCOM_CLK_APCS_SDX55) += apcs-sdx55.o obj-$(CONFIG_QCOM_CLK_RPM) += clk-rpm.o obj-$(CONFIG_QCOM_CLK_RPMH) += clk-rpmh.o obj-$(CONFIG_QCOM_CLK_SMD_RPM) += clk-smd-rpm.o |