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authorNaveen Yadav <naveenky@codeaurora.org>2020-11-26 12:58:40 +0530
committerStephen Boyd <sboyd@kernel.org>2020-12-07 16:59:58 -0800
commit3fade566c07abd54ad8324326a4a14f2b6c13e3d (patch)
treea6ff25d263cce397fad368f63f1a148305714627 /drivers/clk/qcom/Kconfig
parenta13ae5a3797aa86623c906604fb5a884b832a685 (diff)
clk: qcom: Add SDX55 GCC support
Add Global Clock Controller (GCC) support for SDX55 SoCs from Qualcomm. Signed-off-by: Naveen Yadav <naveenky@codeaurora.org> [mani: converted to parent_data, commented critical clocks, cleanups] Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20201126072844.35370-3-manivannan.sadhasivam@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/qcom/Kconfig')
-rw-r--r--drivers/clk/qcom/Kconfig7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
index 8c8b568609d4..3555eac37495 100644
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
@@ -422,6 +422,13 @@ config SDM_LPASSCC_845
Say Y if you want to use the LPASS branch clocks of the LPASS clock
controller to reset the LPASS subsystem.
+config SDX_GCC_55
+ tristate "SDX55 Global Clock Controller"
+ help
+ Support for the global clock controller on SDX55 devices.
+ Say Y if you want to use peripheral devices such as UART,
+ SPI, I2C, USB, SD/UFS, PCIe etc.
+
config SM_DISPCC_8250
tristate "SM8150 and SM8250 Display Clock Controller"
depends on SM_GCC_8150 || SM_GCC_8250