diff options
| author | Michael Turquette <mturquette@baylibre.com> | 2016-06-06 23:16:17 -0700 |
|---|---|---|
| committer | Michael Turquette <mturquette@baylibre.com> | 2016-06-22 18:02:59 -0700 |
| commit | 1c50da4f27cbfb588b59684b55eb7a087bb26ed1 (patch) | |
| tree | 476a4b396e86fb59ad46baa1e2156d25a36003aa /drivers/clk/meson/Makefile | |
| parent | 73de5c8bcf4924faf5d57c3d626b01a04ed1ee41 (diff) | |
clk: meson: add mpll support
MPLLs are adjustable rate clocks derived from PLLs. On both Meson8b and
GXBB they appear to be only derived from fixed_pll.
Add support for these clock types so that they can be added to their
respective drivers.
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Diffstat (limited to 'drivers/clk/meson/Makefile')
| -rw-r--r-- | drivers/clk/meson/Makefile | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile index b3d60fecd846..7667218b5e46 100644 --- a/drivers/clk/meson/Makefile +++ b/drivers/clk/meson/Makefile @@ -2,5 +2,5 @@ # Makefile for Meson specific clk # -obj-$(CONFIG_COMMON_CLK_AMLOGIC) += clk-pll.o clk-cpu.o +obj-$(CONFIG_COMMON_CLK_AMLOGIC) += clk-pll.o clk-cpu.o clk-mpll.o obj-$(CONFIG_COMMON_CLK_MESON8B) += meson8b-clkc.o |