diff options
| author | Paul Cercueil <paul@crapouillou.net> | 2018-01-16 16:47:53 +0100 |
|---|---|---|
| committer | James Hogan <jhogan@kernel.org> | 2018-01-18 22:05:13 +0000 |
| commit | 268db077ac47d3b5d8e3a768bf9dc5cb32ce6074 (patch) | |
| tree | 59380382f525ff4869a1ac1d5b586fde3059ea48 /drivers/clk/clk-xgene.c | |
| parent | e6cfa64375d34a6c8c1861868a381013b2d3b921 (diff) | |
clk: ingenic: support PLLs with no bypass bit
The second PLL of the JZ4770 does not have a bypass bit.
This commit makes it possible to support it with the current common CGU
code.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Maarten ter Huurne <maarten@treewalker.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/18479/
Signed-off-by: James Hogan <jhogan@kernel.org>
Diffstat (limited to 'drivers/clk/clk-xgene.c')
0 files changed, 0 insertions, 0 deletions