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authorWesley Cheng <wcheng@codeaurora.org>2020-03-17 13:53:31 -0700
committerStephen Boyd <sboyd@kernel.org>2020-03-20 16:33:56 -0700
commit8411aa5059edd584f7022f1dc300aa2f8f89fd06 (patch)
treea580c3ffbd45bc933bc8177d43e8efa77e82c7a6 /drivers/clk/clk-wm831x.c
parent1aec193ea41d672d11592714cdda8167eb3b38fc (diff)
clk: qcom: gcc: Add USB3 PIPE clock and GDSC for SM8150
This adds the USB3 PIPE clock and GDSC structures, so that the USB driver can vote for these resources to be enabled/disabled when required. Both are needed for SS and HS USB paths to operate properly. The GDSC will allow the USB system to be brought out of reset, while the PIPE clock is needed for data transactions between the PHY and controller. Signed-off-by: Wesley Cheng <wcheng@codeaurora.org> Link: https://lkml.kernel.org/r/1584478412-7798-2-git-send-email-wcheng@codeaurora.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/clk-wm831x.c')
0 files changed, 0 insertions, 0 deletions