diff options
| author | Martin Blumenstingl <martin.blumenstingl@googlemail.com> | 2021-06-28 00:39:58 +0200 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2021-06-30 11:37:02 -0700 |
| commit | db400ac1444b756030249ed4a35e53a68e557b59 (patch) | |
| tree | 06c36916ccbc9162087b2c448a8929b673a571cd /drivers/clk/clk-divider.c | |
| parent | bbd7a6cc382f4317b08ba71151b23abf76fc4c34 (diff) | |
clk: divider: Switch from .round_rate to .determine_rate by default
.determine_rate is meant to replace .round_rate. The former comes with a
benefit which is especially relevant on 32-bit systems: since
.determine_rate uses an "unsigned long" (compared to a "signed long"
which is used by .round_rate) the maximum value on 32-bit systems
increases from 2^31 (or approx. 2.14GHz) to 2^32 (or approx. 4.29GHz).
Switch to a .determine_rate implementation by default so 32-bit systems
can benefit from the increased maximum value as well as so we have one
fewer user of .round_rate.
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20210627223959.188139-3-martin.blumenstingl@googlemail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/clk-divider.c')
| -rw-r--r-- | drivers/clk/clk-divider.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index 87ba4966b0e8..9e05e81116af 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -425,8 +425,8 @@ long divider_ro_round_rate_parent(struct clk_hw *hw, struct clk_hw *parent, } EXPORT_SYMBOL_GPL(divider_ro_round_rate_parent); -static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int clk_divider_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_divider *divider = to_clk_divider(hw); @@ -437,13 +437,13 @@ static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate, val = clk_div_readl(divider) >> divider->shift; val &= clk_div_mask(divider->width); - return divider_ro_round_rate(hw, rate, prate, divider->table, - divider->width, divider->flags, - val); + return divider_ro_determine_rate(hw, req, divider->table, + divider->width, + divider->flags, val); } - return divider_round_rate(hw, rate, prate, divider->table, - divider->width, divider->flags); + return divider_determine_rate(hw, req, divider->table, divider->width, + divider->flags); } int divider_get_val(unsigned long rate, unsigned long parent_rate, @@ -500,14 +500,14 @@ static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate, const struct clk_ops clk_divider_ops = { .recalc_rate = clk_divider_recalc_rate, - .round_rate = clk_divider_round_rate, + .determine_rate = clk_divider_determine_rate, .set_rate = clk_divider_set_rate, }; EXPORT_SYMBOL_GPL(clk_divider_ops); const struct clk_ops clk_divider_ro_ops = { .recalc_rate = clk_divider_recalc_rate, - .round_rate = clk_divider_round_rate, + .determine_rate = clk_divider_determine_rate, }; EXPORT_SYMBOL_GPL(clk_divider_ro_ops); |