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| author | Jiasen Lin <linjiasen@hygon.cn> | 2019-11-07 01:35:36 -0800 |
|---|---|---|
| committer | Jon Mason <jdmason@kudzu.us> | 2020-03-12 20:41:25 -0400 |
| commit | bb81bf62151031df004864eabee0431c8b8e9064 (patch) | |
| tree | 734a4d8728ef138c5bd759f0b8e39a3571106391 /drivers/base/power/clock_ops.c | |
| parent | bb6d3fb354c5ee8d6bde2d576eb7220ea09862b9 (diff) | |
NTB: Fix an error in get link status
The offset of PCIe Capability Header for AMD and HYGON NTB is 0x64,
but the macro which named "AMD_LINK_STATUS_OFFSET" is defined as 0x68.
It is offset of Device Capabilities Reg rather than Link Control Reg.
This code trigger an error in get link statsus:
cat /sys/kernel/debug/ntb_hw_amd/0000:43:00.1/info
LNK STA - 0x8fa1
Link Status - Up
Link Speed - PCI-E Gen 0
Link Width - x0
This patch use pcie_capability_read_dword to get link status.
After fix this issue, we can get link status accurately:
cat /sys/kernel/debug/ntb_hw_amd/0000:43:00.1/info
LNK STA - 0x11030042
Link Status - Up
Link Speed - PCI-E Gen 3
Link Width - x16
Fixes: a1b3695820aa4 ("NTB: Add support for AMD PCI-Express Non-Transparent Bridge")
Signed-off-by: Jiasen Lin <linjiasen@hygon.cn>
Signed-off-by: Jon Mason <jdmason@kudzu.us>
Diffstat (limited to 'drivers/base/power/clock_ops.c')
0 files changed, 0 insertions, 0 deletions