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author | Thomas Gleixner <tglx@linutronix.de> | 2020-12-06 22:46:16 +0100 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2020-12-11 10:40:52 +0100 |
commit | b0ecd8e8c5ef376777277c4c2db7de92ac59f23f (patch) | |
tree | d068dfd5fd0975a676891ea8be5c71d5a88e0c7e /drivers/ata/sata_svw.c | |
parent | dcf257e92622ba0e25fdc4b6699683e7ae67e2a1 (diff) |
rtc: cmos: Make rtc_cmos sync offset correct
The offset for rtc_cmos must be -500ms to work correctly with the current
implementation of rtc_set_ntp_time() due to the following:
tsched twrite(t2.tv_sec - 1) t2 (seconds increment)
twrite - tsched is the transport time for the write to hit the device,
which is negligible for this chip because it's accessed directly.
t2 - twrite = 500ms according to the datasheet.
But rtc_set_ntp_time() calculation of tsched is:
tsched = t2 - 1sec - (t2 - twrite)
The default for the sync offset is 500ms which means that the write happens
at t2 - 1.5 seconds which is obviously off by a second for this device.
Make the offset -500ms so it works correct.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20201206220541.830517160@linutronix.de
Diffstat (limited to 'drivers/ata/sata_svw.c')
0 files changed, 0 insertions, 0 deletions