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authorUlrich Hecht <uli+renesas@fpond.eu>2021-01-12 17:59:08 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2021-01-14 12:06:15 +0100
commit537db25ca330dce0087e7620b6c07c0a9aa766ed (patch)
tree9a2ded95eddcc1c52204ffbf5483bb0e79aa5391 /crypto
parente127ef2ed0a6099ca6ccc55ff11a812514b6aee6 (diff)
pinctrl: renesas: Add I/O voltage level flag
This patch adds config macros describing the voltage levels available on a pin. The current default (3.3V/1.8V) maps to zero to avoid having to change existing PFC implementations. Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210112165912.30876-3-uli+renesas@fpond.eu Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'crypto')
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