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author | José Roberto de Souza <jose.souza@intel.com> | 2020-10-07 12:52:37 -0700 |
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committer | José Roberto de Souza <jose.souza@intel.com> | 2020-10-09 15:07:36 -0700 |
commit | 5c90660fcc452824b767744f3f4e09a335ce8f91 (patch) | |
tree | aca35be17c9f823d4bc8bb06ef2c92e277feb188 /crypto/fcrypt.c | |
parent | 90a24b9d737c54b3a20d1a3d0a2e2cd872a442ee (diff) |
drm/i915/display: Check PSR parameter and flag only in state compute phase
Due to the debugfs flag, has_psr2 in CRTC state could have a different
value than psr.psr2_enabled and it was causing PSR2 subfeatures(DC3CO
and selective fetch) to be set to not a expected state.
So here only taking in consideration the parameter and debugfs flag
when computing PSR state, this way the CRTC state will also have
the correct state.
intel_psr_fastset_force() was already broken as
intel_psr_compute_config() was already only enabling PSR when
psr_global_enabled() and all other PSR requirements are met.
So some changes was required in this function, now it iterates over
all connectors, if it is a eDP connector and is active force a modeset
in the CRTC driving this connector, what will cause the new PSR state
to be set based on the debugfs flag.
v2:
- end connector iterator in error cases
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201007195238.53955-2-jose.souza@intel.com
Diffstat (limited to 'crypto/fcrypt.c')
0 files changed, 0 insertions, 0 deletions