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authorFaiz Abbas <faiz_abbas@ti.com>2021-03-30 16:31:34 +0530
committerVinod Koul <vkoul@kernel.org>2021-03-31 16:45:47 +0530
commit725c7b8d300f8f26163435628b41a4c0a014dd24 (patch)
treec13a1cf4d8e781cbb828ee34c46b014b1d42d806 /crypto/ecdh.c
parent1436ec309e6251b372b757bfacf88f5954b8f3fd (diff)
phy: ti: j721e-wiz: Do not configure wiz if its already configured
Serdes lanes might be shared between multiple cores in some usecases and its not possible to lock PLLs for both the lanes independently by the two cores. This requires a bootloader to configure both the lanes at early boot time. To handle this case, skip all configuration if any of the lanes has already been enabled. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/20210330110138.24356-2-kishon@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'crypto/ecdh.c')
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